Sony STR-DG910 Service Manual page 69

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Pin No.
71 to 74
75
76
77
78
79
80
81
82 AUDPVCC18
83
84
85
86
87
88
89
90
91
92 to 96 QE23 to QE19
97
98
99 to 105 QE18 to QE12
106
107
TE
L 13942296513
108 to 111 QE11 to QE8
112
113
114 to 117 QE7 to QE4
118
119
120
121 to 124 QE3 to QE0
125
126
127
128
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Pin Name I/O
SD3 to SD0 O Serial data output for DSP and HDMI TX.
WS O Word select signal output for DSP and HDMI TX.
SCK O Serial clock signal output for DSP and HDMI TX.
IOVCC — Power supply terminal (+3.3 V)
IOGND — Ground
MCLK O Audio master clock signal output for DSP and HDMI TX.
CGND — Ground
CVCC18 — Power supply terminal (+1.8 V)
— Power supply terminal (+1.8 V)
AUDPGND — Ground
XTALOUT O System clock output (28.322 MHz)
XTALIN I System clock input (28.322 MHz)
XTALVCC — Power supply terminal (+3.3 V)
REGVCC — Power supply terminal (+3.3 V)
RSVDL — Not used. (Fixed at L)
RESET I Reset signal input from HDMI controller. (L: Reset)
SCDT — Not used. (Open)
INT O Interrupt signal output for HDMI controller.
O Serial data output 23 to 19 for HDMI TX, video processor and D/A converter.
IOGND — Ground
IOVCC — Power supply terminal (+3.3 V)
O Serial data output 18 to 12 for HDMI TX, video processor and D/A converter.
IOGND — Ground
IOVCC — Power supply terminal (+3.3 V)
O Serial data output 11 to 8 for HDMI TX, video processor and D/A converter.
CVCC18 — Power supply terminal (+1.8 V)
CGND — Ground
O Serial data output 7 to 4 for HDMI TX, video processor and D/A converter.
IOGND — Ground
ODCK O Output data clock signal output for HDMI TX.
IOVCC — Power supply terminal (+3.3 V)
O Serial data output 3 to 0 for HDMI TX, video processor and D/A converter.
CVCC18 — Power supply terminal (+1.8 V)
CGND — Ground
DE O Data enable signal output for HDMI TX.
HSYNC O Horizontal synchronize signal output for HDMI TX.
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Pin Description
1 5 0 5 8 2 9 9 4
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STR-DG910
9 9
2 8 9 9
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