Typical Board Settings; Physical And Electrical - Texas Instruments DEM-DAI3008 User Manual

JP2 selects the BCK clock source.
DIR: BCK clock generated by DAI receiver
256/384/512: BCK clock generated by XTAL oscillator
JP3 selects the LRCK (f
DIR: LRCK clock generated by DAI receiver
256/384/512: LRCK clock generated by XTAL oscillator
JP4 selects the clock frequency of the XTAL oscillator clock.
256/512fs: for 256 f
384fs: for 384 f
JP5 selects the DAI transmitter clock source.
512,384 : 384 f
DIR1: 256 f
s
DIR2: Transparent operating mode for DAI transmitter
NOTE:
In certain applications it is desirable to receive digital audio data with the CS8412 and retransmit
it with the CS8402. In these situations, user and validity information and channel status must pass through
unaltered. Details of transparent operation are described in Crystal's CS8402 data sheet.
3.2.3

Typical Board Settings

Jumper settings that are considered appropriate for some typical operating conditions are listed in the
following tables.
Typical settings for DAC operation
Typical settings for ADC operation by DAI receiver clock
Typical settings for ADC operation by XTAL clock
JP1
XTAL
4

Physical and Electrical

The silkscreen of the PCM3008 daughterboard is shown in Figure 3, and the top and bottom copper layers
are shown in Figure 4 and Figure 5, respectively. Figure 6 is the schematic of the daughterboard, and the
schematic of the motherboard is in Appendix A.
) clock source.
s
or 512 f operation
s s
operation
s
or 512 f XTAL clock
s s
clock from XTAL clock or clock generated by DAI receiver
JP1 JP2
NML DIR
JP1 JP2
NML DIR
JP2 JP3
256 to 512 256 to 512
JP3 JP4 JP5
DIR – –
JP3 JP4 JP5
DIR – DIR1
JP4
256 to 512
DEM-DAI3008 PCM3008 Evaluation Board
JP6
NML
JP6
NML
JP5 JP6
512/DIR1 NML
SLEU006
5