C-Bus And 3-Wire Serial Bus Interfaces; Register Definitions; Offset Register - Philips Triple high-speed Analog-to-Digital Converter 110 Msps TDA8752B Specification

Philips Semiconductors
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9. I

C-bus and 3-wire serial bus interfaces

9.1 Register definitions
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Table 4: I C-bus and 3-wire serial bus registers
Function Subaddress
name
A7 A6 A5 A4 A3 A2 A1 A0 MSB
SUBADDR
OFFSETR X X X
COARSER X X X
FINER X X X
OFFSETG X X X
COARSEG X X X
FINEG X X X
OFFSETB X X X
COARSEB X X X
FINEB X X X
CONTROL X X X
VCO X X X
DIVIDER X X X
(LSB)
PHASEA X X X
PHASEB X X X

9.1.1 Offset register

9397 750 07338
Product specification
The configuration of the different registers is shown in
Bit definition
X
X 0 0 0 0 Or7
X 0 0 0 1 Or8
X 0 0 1 0 X
X 0 0 1 1 Og7
X 0 1 0 0 Og8
X 0 1 0 1 X
X 0 1 1 0 Ob7
X 0 1 1 1 Ob8
X 1 0 0 0 X
X 1 0 0 1 Vlevel Hlevel
X 1 0 1 0 Z2
X 1 0 1 1 Di8
X 1 1 0 0 X
X 1 1 0 1 X
All the registers are defined by a subaddress of 8 bits; bit A4 refers to the mode which
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is used with the I C-bus interface; bits Sa3 to Sa0 are the subaddresses of each
register.
Bit Mode, used only with the I
Mode 0 if bit Mode = 0, each register is programmed independently by giving its
subaddress and its content
Mode 1 if bit Mode = 1, all the registers are programmed one after the other by
giving this initial condition (XXX1 1111) as the subaddress state; thus,
the registers are charged following the predefined sequence of 16 bytes
(from subaddress 0000 to 1101).
This register controls the clamp level for the RGB channels. The relationship between
the programming code and the level of the clamp code is given in
Rev. 03 — 21 July 2000
Triple high-speed Analog-to-Digital Converter 110 Msps
X X Mode Sa3
Or6 Or5 Or4 Or3
Cr6 Cr5 Cr4 Cr3
X X Fr4 Fr3
Og6 Og5 Og4 Og3
Cg6 Cg5 Cg4 Cg3
X X Fg4 Fg3
Ob6 Ob5 Ob4 Ob3
Cb6 Cb5 Cb4 Cb3
X X Fb4 Fb3
Edge Up Do
Z1 Z0 Vco1 Vco0 Di11
Di7 Di6 Di5 Di4
Di0 Cka Pa4 Pa3
Ckab Ckb Pb4 Pb3
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C-bus, enables two modes to be programmed:
TDA8752B
Table 4.
Default
value
LSB
Sa2 Sa1 Sa0 XXX1 0000
Or2 Or1 Or0 0111 1111
Cr2 Cr1 Cr0 0010 0000
Fr2 Fr1 Fr0 XXX0 0000
Og2 Og1 Og0 0111 1111
Cg2 Cg1 Cg0 0010 0000
Fg2 Fg1 Fg0 XXX0 0000
Ob2 Ob1 Ob0 0111 1111
Cb2 Cb1 Cb0 0010 0000
Fb2 Fb1 Fb0 XXX0 0000
Ip2 Ip1 Ip0 0000 0100
Di10 Di9 0110 0001
Di3 Di2 Di1 1001 0000
Pa2 Pa1 Pa0 X000 0000
Pb2 Pb1 Pb0 X000 0000
Table 5.
© Philips Electronics N.V. 2000. All rights reserved.
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