Hardware Description; Video-Input Interface; Analog Audio-Input Interface; Mpeg Stream (Ps Stream) Output Interface - Philips ISP1581 User Manual

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7. Hardware Description

This section briefly describes the hardware implementation of the MPEG2 encoder with
Hi-Speed USB solution in terms of functions and connections between various interfaces. A
functional block diagram of the reference design is given in Figure 7-1.
Composite
Video Input
Video
Input
S-Video
Analog Audio
Figure 7-1: Functional Block Diagram of the USB MPEG2 Encoder Reference Kit
7.1.

Video-Input Interface

The video-input interface consists of two analog inputs to connect Composite Video Bit Steam
(CVBS) and Luminance Chrominance (YC) sources to the board. A video-input processor (VIP)
SAA7114 is used on the board for video decoding and analog-to-digital conversion.
7.2.

Analog Audio-Input Interface

The serial audio I
analog input source, using the audio bit-stream analog-to-digital converter DA1361TS for
generating the I
7.3.

MPEG Stream (PS Stream) Output Interface

The MPEG stream output port connects the SAA6752HS multiplexer to USB through a Complex
Programmable Logic Device (CPLD). The MPEG stream is set to the Data Expansion Bus
Interface (DEBI) slave mode. The output format is TTL. This interface also includes the data
request signal as SAA6752HS input and the data validated signal as SAA6752HS output.
7.4. I
The P87C52X2 MCU is a bus master. It relays all I
components on the board through the control pipe.
User manual
YUV4.2.0/YUV4.2.2
Video Decoder
Input
2
I C Slave
Audio Decoder
Input
2
S ports are implemented on the board. These port can be provided with an
2
S signal.
2

C-Bus Interface

ISP1581 Hi-Speed USB MPEG2 Encoder Reference Kit
MPEG2
Encoder
I 2 S
2
I C Slave
I 2 C-Bus I 2 C Master
2 C-Bus commands from the host to different
Rev. 03.00 — 12 April 2004
UM10016_3
PS Stream
CPLD
P87C54S
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
High-Speed USB
ISP1581
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