Block Diagram - Philips Triple high-speed Analog-to-Digital Converter 110 Msps TDA8752B Specification

Triple high-speed analog-to-digital converter 110 msps
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Philips Semiconductors

6. Block diagram

V CCA(R)
V CCA(B)
V CCA(G)
11
19
6
RAGC
8
RGAINC
12
RIN
10
RDEC
3
V ref
14
GAGC
16
GGAINC
20
GIN
18
GDEC
22
BAGC
24
BGAINC
28
BIN
26
BDEC
36
TDO
35
TCK
34
ADD2
33
ADD1
INTERFACE
38
SEN
42
SCL
39
SDA
37
DIS
32
2
I
C/3W
1, 5, 30, 31, 43 , 44
50, 51, 100
n.c.
Fig 1. Block diagram.
9397 750 07338
Product specification
V CCO(R)
V CCO(B)
V CCA(PLL)
V DDD
V CCO(G)
V CCD
27
40
79
69
59
95
MUX
HSYNCI
SERIAL
2
I
C-BUS
OR
3-WIRE
2
I
C-bus; 1-bit
(Hlevel)
90
HSYNC
Rev. 03 — 21 July 2000
Triple high-speed Analog-to-Digital Converter 110 Msps
V SSD
CLP
AGND G
V CCO(PLL)
AGND R
AGND B
99
85
89
13
21
29
CLAMP
ADC
RED CHANNEL
GREEN CHANNEL
BLUE CHANNEL
TDA8752B
REGULATOR
4
2
88
DEC1
DEC2
PWDWN
CP
TDA8752B
OGND G
AGND PLL
DGND
OGND R
OGND B
OGND PLL
41
70
60
48
96
82
86
71 to 78
OUTPUTS
61 to 68
49, 52 to 58
PLL
97
98
FCE467
CZ
© Philips Electronics N.V. 2000. All rights reserved.
9
RCLP
7
RBOT
R0 to R7
45
ROR
17
GCLP
15
GBOT
G0 to G7
46
GOR
87
OE
25
BCLP
23
BBOT
B0 to B7
47
BOR
84
CKADCO
83
CKBO
81
CKAO
80
CKREFO
92
CKEXT
91
INV
93
COAST
94
CKREF
4 of 38

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