Coarse And Fine Registers - Philips Triple high-speed Analog-to-Digital Converter 110 Msps TDA8752B Specification

Philips Semiconductors
9.1.2 Coarse and fine registers
9397 750 07338
Product specification
Table 5: Coding
Programmed code
0
1
2
...
127
...
254
255
256
...
287
The default programmed value is:
•
Programmed code = 127
•
Clamp code = 0
•
ADC output = 0.
These two registers enable the gain control, the AGC gain with the coarse register
and the reference voltage with the fine register. The coarse register programming
equation is as follows:
N +
COARSE
GAIN = ----------------------------------------------- -
N
FINE
V 1 – ----------------- -
ref
32 16
Where: V = 2.5 V.
ref
The gain correspondence is given in
programming code (N
FINE
Table 6: Gain correspondence (COARSE)
N
COARSE
32
99
The default programmed value is as follows:
•
N = 32
COARSE
•
Gain = 0.825
•
V to be full-scale = 1.212 V.
i
To modulate this gain, the fine register is programmed using the above equation. With
a full-scale ADC input, the fine register resolution is a
(see Table 7 for N
COARSE
Rev. 03 — 21 July 2000
Triple high-speed Analog-to-Digital Converter 110 Msps
Clamp code
63.5
63
62.5
...
0
...
63.5
64
120
...
136
1 N
1
COARSE
----- - = --------------------------------------------------
16 V 512 N –
ref
Table 6. The gain is linear with reference to the
= 0).
Gain
0.825
2.5
= 32).
TDA8752B
ADC output
underflow
0
...
63 or 64
64
120
136
+ 1
32
FINE
V to be full-scale (V)
i
1.212
0.4
1
LSB peak-to-peak
2
© Philips Electronics N.V. 2000. All rights reserved.
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