C-Bus And 3-Wire Serial Bus Interface - Philips Triple high-speed Analog-to-Digital Converter 110 Msps TDA8752B Specification

Philips Semiconductors
CKREF
CKREF
Slave at 180 deg phase shift with respect to pin CKADCO of the master TDA8752B.
Fig 9. Dual TDA8752B solution for pixel clock rate with a single phase adjustment (100 to 200 MHz).
8.7 I
9397 750 07338
Product specification
COAST
phase selector A
2
I C-bus;
5 bits (Pa)
PLL
phase selector B
2
I C-bus; 5 bits (Pb)
Master TDA8752B
(even pixels)
COAST
phase selector A
2
I C-bus;
5 bits (Pa)
PLL
phase selector B
2
I C-bus; 5 bits (Pb)
Slave TDA8752B
(odd pixels)
2

C-bus and 3-wire serial bus interface

2
The I C-bus and 3-wire serial buses control the status of the different control DACs
and registers. Control pin DIS enables or disables the full serial interface function
(disable at HIGH level). Four ICs can be used in the same system and programmed
by the same bus. Therefore, two pins (ADD1 and ADD2) are available to set each
address respectively, for use with the I
2
in Section 9 "I C-bus and 3-wire serial bus
Rev. 03 — 21 July 2000
Triple high-speed Analog-to-Digital Converter 110 Msps
CKEXT INV
12 to
100 MHz
MUX 0 /180
2
CLKADC
I C-bus;
1 bit (Cka)
(Cka = 1)
MUX
NCKBO
MUX
2
I C-bus;
1 bit (Ckab)
(Ckab = 1)
SYNCHRO
CKEXT INV
12 to
100 MHz
MUX 0 /180
2
CLKADC
I C-bus;
1 bit (Cka)
(Cka = 1)
MUX
NCKBO
MUX
2
I C-bus;
1 bit (Ckab)
(Ckab = 0)
SYNCHRO
2
C-bus interface. All programming is described
interfaces".
TDA8752B
CKADCO
CKBO
2
I C-bus;
1 bit (Ckb)
(Ckb = 1)
CKAO
CKREFO
CKADCO
CKBO
2
I C-bus;
1 bit (Ckb)
(Ckb = 0)
CKAO
CKREFO
FCE466
© Philips Electronics N.V. 2000. All rights reserved.
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