Yamaha RX-V1067 Service Manual page 86

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RX-V1067/HTR-8063/RX-A1000
IC504: YTD-446CZ (VIDEO P.C.B.)
VNP2 (Video and network processor)
* No replacement part available. / サービス部品供給なし
Memory I/F
Memory
Controller0
Memory
Controller1
USB
SD Host
SD Host I/F 0
SD Host I/F 1
Pin
Function
Port Name
No.
Name
VNP2_N_
M25 nRESET
RST
T25 XI_S
T24 XO_S
AE24 XI_A
AD24 XO_A
T22 TEST0
TEST0
R23 TEST1
T23 TEST2
L23 nSCS3
N_SCS3
L24 nSCS2
N_SCS2
K23 nSCS1
N_SCS1
L24 nSCS0
N_SCS0
J23 nSLBE
N_SLBE
J24 nSUBE
N_SUBE
K25 nSWR
N_SWE
J25 nSRD
N_SRD
**
SA[22:0]
SRA[22:0]
**
SD[15:0]
SRD[15:0]
SDRAM_
B1
SCLK0
CLK0
SDRAM_
C1
SCKE0
CKE0
SDRAM_
D1
SCLK1
CLK1
SDRAM_
E1
SCKE1
CKE1
F1
nCS1
86
ARM926EJ-S
ARM9EJ-S
I-cache
16KB
I-TCM
JTAG
16KB
Encryption
Engine
Network Engine
802.3
802.3
MAC0
MAC1
Processing
Condition when
Condition
used
when not used
Terminal
Processing
Condi-
Proce-
DIR
tion
ssing
10kPD
I
5MHz quartz
I
crystal unit
5MHz quartz
O
crystal unit
24.576MHz
crystal
I
oscillator
OPEN
O
10kPU
I
GND at J
I
GND at J
I
O
O
O
O
O
O
O
O
O
10kPU
B
O
O
O
O
O
Interrupt
Controller
MMU
Dual Timer0
D-cache
Dual Timer1
16KB
Watchdog
Timer
D-TCM
16KB
DMA
Audio Engine
Programmable
DSP
Audio I/F
Related Power Supply
OFF
Logic
I/O Logic
L act
System reset terminal
Clock
System clock crystal oscillation terminal
Clock
System clock crystal oscillation terminal
Clock
Audio clock crystal oscillation terminal
Clock
H act
System reset terminal
H act
H act
BUS
Chip select 3
BUS
Chip select 2
BUS
Chip select 1 FLASH_N_CS
BUS
Chip select 0
BUS
Lower byte enable
BUS
Upper byte enable
BUS
Write enable
BUS
Read enable
BUS
External I/O address bus
BUS
External I/O data bus
Clock
SDRAM clock enable
H act
SDRAM clock enable
Clock
SDRAM clock enable
H act
SDRAM clock enable
BUS
SDRAM chip select 1
GPIO
SPI
UART0
UART1
UART2
I2C
Power Manager
Clock Gen.
PLL
Reset Control
Detail of Function

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