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(3) The V
signal from the target system is left open in the IE-703089-MC-EM1.
DD1
(4) The following conditions must be satisfied when other than V
1. When FCAN is used, PORTV
circuit emulator)
2. When ADC is used, V
4.2 I/O Signal
The input signal (NMI signal) from the target system, the I/O signals for ports 4, 5, 6, and 11, and the I/O signal for
port 9 are all delayed (t
PD
respectively, before being input to the emulator chip.
The DC characteristics also change. The input voltage becomes V
= ±0.5 µ A (MAX.).
input current becomes I
IN
Target
system
4.3 V
Signal
PP
The V
signal from the target system is left open in the emulator.
PP
4.4 NMI Signal Mask Function
When using the P00/NMI pin in the port mode, do not mask the NMI signal.
CHAPTER 4
≤ PORTV
DD1
DD2
= ADCV
= 4.5 to 5.5 V
DD0
DD
= 0.25 ns (typ.)) because they pass through Q switches QS3125, QS3384, and QS3244,
Figure 4-2. I/O Signal Flow Path
NMI signal
NMI pin
Port signal
Port pin
User's Manual U15776EJ1V0UM
CAUTIONS
= V
= ADCV
DD0
DD1
(restricted by the power supply voltage conditions of the in-
= 2.0 V (MIN.), V
IH
IE-703089-MC-EM1
QS3125
QS3384/
QS3244
= PORTV
= PORTV
DD
DD1
DD2
= 0.8 V (MAX.), and the
IL
Emulator chip
.
29
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