Nmi Signal; Pp Signal; Nmi Signal Mask Function; Nmi Signal Flow Path - NEC V850/SF1 User Manual

4.2 NMI Signal

The input signal (NMI signal) from the target system is delayed (t
QS3125 (Q switch), and I/O signals (ports 4, 5, 6, 9, 11) pass through QS3384 (Q switch) before it is input to the
emulator chip.
In addition, the DC characteristics change. The input voltage becomes V
the input current becomes I
Target
system
4.3 V Signal
PP
The V signal from the target system is left open in the emulator.
PP

4.4 NMI Signal Mask Function

When using the P00/NMI pin in the port mode, do not mask the NMI signal.
CHAPTER 4
= ±0.5 µ A (MAX.).
IN
Figure 4-2. NMI Signal Flow Path
NMI signal
NMI pin
Port signal
Port pin
User's Manual U15447EJ1V0UM
CAUTIONS
= 0.25 ns (TYP.)) because it passes through
pD
= 2.0 V (MIN.), V
IH
IE-703079-MC-EM1
QS3125
Emulator chip
QS3125
= 0.8 V (MAX.), and
IL
25