Table of Contents
Advertisement
1.6 Block Diagram
KR00 to KR07
TI01/TO01/P26/INTP0
REGC
USBDM
USBDP
SCK10/P20
SO10/P21
SI10/P22
INTP0/P26
Remark The parenthesized values apply to the µ PD78F9801.
26
CHAPTER 1
Key return 0
8-bit timer 00
78K/0S
8-bit timer/event
CPU
counter 01
core
Watchdog timer
Regulator
V
REG
USB
function 0
Serial
interface 1
V
Interrupt
DD0
control
User's Manual U12978EJ3V0UD
GENERAL
ROM
Flash
memory
RAM
V
V
V
IC
DD1
SS0
SS1
(V
)
PP
Port 0
P00 to P07
Port 1
P10 to P17
Port 2
P20 to P26
Port 4
P40 to P47
RESET
X1
System control
X2
Advertisement
Table of Contents
