CHAPTER 1 MEMORY SPACE ............................................................................................................... 12
1.1 Memory Spaces ................................................................................................................12
1.3 Vector Table Area ............................................................................................................. 12
1.8 External Memory Space ................................................................................................... 13
TM
Register Area ...................................................................................................... 13
CHAPTER 2 REGISTERS ........................................................................................................................14
2.1 Control Registers ............................................................................................................. 14
2.1.1
Program counter (PC) ......................................................................................................... 14
2.1.2
2.1.3
Stack pointer (SP) ................................................................................................................ 16
CHAPTER 3 ADDRESSING ..................................................................................................................... 20
3.1.1
Relative addressing ............................................................................................................. 20
3.1.2
Immediate addressing ......................................................................................................... 21
3.1.3
Table indirect addressing ................................................................................................... 22
3.1.4
Register addressing ............................................................................................................ 23
3.2.1
Implied addressing .............................................................................................................. 24
3.2.2
Register addressing ............................................................................................................ 25
3.2.3
Direct addressing ................................................................................................................ 26
3.2.4
Short direct addressing ...................................................................................................... 27
3.2.5
3.2.6
3.2.7
Based addressing ................................................................................................................ 30
3.2.8
Based indexed addressing ................................................................................................. 30
3.2.9
Stack addressing ................................................................................................................. 31
CHAPTER 4 INSTRUCTION SET ............................................................................................................32
4.1 Operation ..........................................................................................................................32
4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.2 Instruction Codes ............................................................................................................. 38
4.2.1
4.2.2
Instruction code list ............................................................................................................. 39
CONTENTS
User's Manual U12326EJ4V0UM
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