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Sharp PC-1500 Technical Reference Manual page 97

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,
92
All
and
more
about Sharp
PC-1500
at
http://www.PC-1500.info
• 1
YO-
iY3
is selected by the
decoder
IC
(TC40H139F) when the gate
signal
input
BFO (1 G) is
low.
YO
..
...
• With
!ow
stale
of
i\D 14
and 1
·
\ D
15,
1hc
YO
omput
goes
low so
as
io
sclc<:1
the
(
I
YO)
user
memory
area
of
the
module
unit.
(Address
assignment
of
OOOOH
~
3FFFH)
YI
...
...
With
high
state
of
AD
14and
low
state
of
AD
15.
the Y
I output
goes
low
so
as
(
IY
I)
to sclccl
the
gate
(G2A) of
the
IC
(TC40Hl38
F).
(Address
assignme
nt
of
4000H-7FFFH)
Y2 ...
..
.
With
low sta
te
of AD 14
and
high
state of AD
15.
the
Y2
output goes
low so
as
(
I
Y2)
to select
the optional
ROM
area of the
module
unit.
(Address assignme
nt
of
8000H- BFFFH)
Y3
...
.
.
.
With high
siate
of A014 a
nd AD
15.
the
Y3
outpm
goes
low
so
as
to
select
( IY3)
the
system program
ROM
(SC61328F)
and
the
1/
0
port
(LH58
1 I
or
LH58
10).
(Address
assignment
of
COOOH-FFFFH)
SO-
S7 is
selected
by the
decode
r IC (TC40H138F) when
the
gate signal i'nput
MEO (G1)
is
high, Y1 (G2A)
low, :and
G2B
is
low
(normally low).
SO
.
...
.
.
With
a
ll
of
ADI I. AD
12
and
AD
13
in
low
state,
the
SOt)ulput
goes
low
so
as
(YO)
to
select the
user
RAM (HM6
116).
(Address assignment
of
4()(lOH-47Fl-'H)
SI
......
With
high state
of AD
I
I
amd
low
state
of
AD l2
and
ADl3,
the SI
outpul
(YT)
goes
low so
as
to
select the
optional
user
RAM
area.
(Address
assignme
nt
of
4800H-
4FFFH)
S2
...
...
With
low state of AD
I
I
and ADU
and
high
state
of
ADl2.
the
S2 output
(Y2)
goes low so
as
tc>Sclect
the
·Optional
user
RAM
a
rea.
(/\ddrcss
assignme
nt
of
50<XlH
-571+H)
SJ
......
With
low state
of
AD
I
I
and
AD
l2
and
high
stall:
of
A013. tl11:
SJ
output
(YJ)
goes
low so
as
to
select
the
user
RAM
area.
(Address
assignment
of
580011
- SFFFH)
S4
....
.. With
high
state of
ADI
I
a
nd
AD
l3
a
nd
low
state
of
AD
l2.
the
S4
output
(Y4)
goes low so
as
to
select
the
user
RAM
area.
(Address
assignment of
6000H-
67FFH)
SS ......
Do
nm
use.
S6
.....
.
With
low state
of /\D
I I
and high state of ADl2 a
nd
ADl3.
the
S6 output
(Y6)
goes low
so
as
to
receive
on
the
1/
0
pon
the
data from
the
display
chip
RAM
or
interrupt
inplll
from
the
option. (Address assignment of7000H-77
FFHJ
S7
....
.
.
With all
of
AD
I
I,
t\O
12,
a
nd ADl3
in
high
state.
the
S7
output
gm:s low
so
(Y7)
as
to
select the
system
RA
M
(TC55 14)
(Address
assignmen
t
of
7800H-7f'FFH)
• 2Y2, 2Y3 is selected by the decoder IC (TC40H139) when
the
2G gate becomes
effective alter the selection
(low
state) of the TC40H138F output S6
(Y6).
V2
....
.
. With
low state
of
ADS a
nd high
state
of
DM
EO,
the
2Y2
output
goes
low and
(2 Y2)
makes
the
NANO
gate
output V2
high
so
as
to
select display
chip
I and
3.(Addrcss
assignment
of 7600H-76 FF.H)
VJ
......
With high
state
of
AD8 and
DMEO.
the 2Y3 outpm
goes low
and makes the
(2Y3)
NAND
gate output V3 high so as to
select
display
chip
2
and
4. (Add
ress
assignment of
7700H-77
FFH)
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not
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