Sharp PC-1500 Technical Reference Manual page 15

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2-2-4. CPU pin description
~ :::~ ~ = e
C O t--.
l
M N - U OOO OOO~c~z o88 3ooo8
Z < < < < < < < > < C < < < < < < < <
R/ l'I
~-E~~ ~~~ G G47•e«CG 41 ~B
~
.
07
p4,
59
37
06
PV
60
36 05
PU
61
3S
04
4,os
62
34 03
XL O
63
33 02
XLI
64
32 01
V'°AIT
65
31
DO
IN7
66
LH5801
30 MEO
ING
67
29
M EI
IN S
68
(TOP V IEW )
28 OD
IN4
69
27 HO
IN3
70
26 H l
IN2
71
25
H2
INl
72
24 H3
1 1\'I) 73
23
H 4
NC
74
22
HS
N C
75
21 H6
NC
76
20
H7
1 2 3 4 s 6 7 8 9 101 11213 14 15 1617 18 19
....
w
(/) o oou.. :s::u c ~ -
w O m~o~&cuo~OC~~ - 1~cm
~z mm> m om>>>>>>Z~zzo
0
XLO, XL1
These arc external Cr)'Stal cormcc1ion pins. X 1.0 is the input pin and XLI is t he o utput
pin. Clock freq uency is divided b y two insid e t he C P U. When the 2.6 M H7. crystal is
connecttd. the CP U
o~ra1es
1111dcr I .3M Hz of internal machine cycle.
(j)
ADO- AD15
Address b us. O utputs fro m t hese pins arc 3-srnte (three o m p ut states o f hig h. low and
high impedance) and go high impedance wit h BRQ (Bus RcQucst). Bas ica lly. MK
b ytes of
1 ncrnory
area
i:s
~upportcd
r(>r
d irect
accc~:sing,
h ut
it
is nlad c
possible
to access
even I
28K
area of memo ry are a when MEO a nd ME I are used.
(i)
00- 07
l~idirectional
data bus \V hich i: s used
co
'vrite or data to/ front t he external
n1cn1o ry.
©MEO, ME1
Mcrno.-y enable sig nals. As memory area o f 64K bytes is accessed by M EO and another
64K bytes by M E I. it permits direct access of memory area o f
128K
bytes in total.
S ince f\1 EO is used fol' inst ruction fetch and stack operatio n. accessing by
n1cans
o.fthc
progra1l1 C<ltirtter
J ">
and stack p<>inter S is lin1itcd t<> a n)axinttH tl of 64K bytes.
As for darn accessing. both memory areas covered by M EOand M El can be cont rolled
by a CPU instruction .
9
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