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Sharp PC-1500 Technical Reference Manual page 24

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18
All
and
more
about Sharp
PC-1500
at
http://www.PC-1500.info
Non-maskable
interrupt processing
sequence
lns 1r1!CllC)!l
h \SlfOCIJO(l
r
-·(SJ
s-1-
s
0-IE
0-IRD
Pl-($)
s-
1-s
Pl
l
·
$
s-
1-s
(l:ffCH)-
PH
(l'fl:OH)-
Pl
N
<D
Maskable
interrupt
fetch
If
S=
1005H
before
goir1g
into
the
interrupt
process.
the
contents
of
T
and
P
are
stacked.
and
it
becon1es
S=
1002:H
afler
lhe
processing.
/ -
-
V;ikle
of
S
~
1
002H
3,f
!t:l
lfl((:!1~1p1
1
003H
j:)f~
1
004H
PL
V;:a;oo
of
S
4-
i
005H
I
l,;c;lc>:<:
•1terrvp1
~
When
M
l
is turned
rrom
low
to
high
lcvd,
it
sets
the
flipflop
IR2 active.
If
the
interrupt
enable
IE
is
active
at
this
point
. interrupt
is
req
uested
to
the
CPU.
so
that
the
C:PlJ
starts
executing
the interrupt processing
after
cornplcti<>n
of
current
in~tl'llction
execution. I
R2
will
b<:
reset in
a
course
of
the
inccrrupt process.
\Vhen
interrupt
request
is
issued
\vhilc
IE
is
inactive,
th1:
interrupt
\'
1
ill
be
ignored
even
though
l
ll2
is
set.
MI
input
is
snrnplcd
in
the
san1c
rnanncr
as
in the
<;o.tsc
(lf
N
ri-11
Maskable interrupt
processing sequence
I
SI
S-
l -.S
!)
..
I(
...
.,
:PL-
S)
S
l
·
·
S
i'H
S
S I •S
fff&•
•f'!I
(f/911
•:PL
Do
not
sale
this PDF!!!

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