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Sharp PC-1500 Technical Reference Manual page 49

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44
All
and more about Sharp PC-1500
at
http://www.PC-1500.info
@
ROP (Reset DisP)
Resets the LCD
on/
off
control
Oipflop
D
ISP.
•Forn1at
RDP
@
ITA
(In To Ace)
011cratio11
0
-
·
OISP
Off
pattern
signal
is
generated
frorn
t
he
CPU
internal
I.CD
back
plate
signal
l.incs
nw-
H11
.
The
contents
of
the
input
pon
(INO-
IN7)
arc
transferred
w
the
accumulator.
O nly
the
nag
Z
cha nges.
l;
cJrmat
ITA
@
SIE
(Set
IE)
•Operatio
n
I
!':0-
7
-
·
1
\ccurnu
lato
r
Sets
the
interrupt
enable
flag
IE.
After
this.
it
becomes
ready
for
maskable
int errupt
and timer interrupt
ackno\vJedgc.
No change
takes 11lace
in
other
flags.
•Fclrmat
SI
E
®
RIE (Reset IE)
•Operation
I
- IE
Resets the
interrupt
enable flag
IE. l\f1
cr
this.
1
naskablc
interrupt a nd
1in1cr
int
errupt
arc disabled.
No
change takes
place in o
ther
flags.
1.-(trmat
RIE
@
AMO (Ace
to
Tm
and
0)
Operation
0
-
IE
T
he co
ntents of the
accumulator
arc
transl
erred
to
the
timer
register (TM).
S ince
the
tin1er register
consists of
9
bits.
t he:
accu1r1ulator
c(>11tcnts are
transferred
t<)
tile
)O\V
o
rder
8 bits of
the
register
and
..
0
..
is entered
in
the
hig
hest order
bit.
No
change
takes place
in
other
flags.
F"orn1at
.'\MO
•Opcralion
A
-
T
M
(T
MO-TM7l
0
-
TM8
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