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IC, CXD2652AR
3 7 63 1515 0
Pin No.
Pin Name
1
MNT0
2
MNT1
3
MNT2
4
MNT3
5
SWDT
6
SCLK
7
XLAT
8
SRDT
9
SENS
10
XRST
11
SQSY
12
DQSY
13
RECP
14
XINT
15
TX
16
OSCI
17
OSCO
TE
L 13942296513
18
XTSL
19
NC
20
DVSS
21
DIN
22
DOUT
23
ADDT
24
DADT
25
LRCK
26
XBCK
27
FS256
28
DVDD
29
A03
30
A02
31
A01
32
A00
33
A10
www
34
A04
35
A05
36
A06
.
37
A07
http://www.xiaoyu163.com
I/O
O
Monitor output terminal.
O
Monitor output terminal.
O
Monitor output terminal.
O
Monitor output terminal.
I
Microprocessor serial interface data input.
I
Microprocessor serial interface shift clock input.
I
Microprocessor serial interface latch input. Latched at falling down edge.
O
Microprocessor serial interface data output.
The terminal which outputs internal status in accordance with the address of the
O
microprocessor serial interface.
I
Reset input. L: reset.
O
Disc sub code Q sync/ADIP sync output.
Subcode Q sync output of U-bit CD or MD format when the DIGITAL IN source is
O
CD or MD.
I
Laser power selection input. H: Recording power, L: Playback power.
O
Interrupt request output terminal. L is output when interrupt status is generated.
I
Record data output enable signal input terminal. H: enable.
I
Crystal oscillator circuit input terminal.
O
Crystal oscillator circuit output terminal. (Inverted output of OSCI).
OSCI terminal input frequency selection. H: 512 Fs (22.5792 MHz), L: 1024 Fs
I
(45.1584 MHz).
—
Not connected.
—
Digital GND.
I
Digital audio interface signal input.
O
Digital audio interface signal output.
Analog recording signal input terminal. (External A/D converter output is connected to
I
this terminal).
O
RECORD monitor output/decode audio data output.
O
LRCK (44.1 kHz) output terminal to external audio block.
O
Bit clock output (2.8224 kHz) output terminal to external audio block.
O
256 Fs output. (11.2896 MHz).
—
Digital power supply.
O
Address output to external DRAM.
O
Address output to external DRAM.
O
Address output to external DRAM.
O
Address output to external DRAM.
O
Address output to external DRAM. (Not used).
O
Address output to external DRAM.
x
O
ao
Address output to external DRAM.
u163
y
O
Address output to external DRAM.
i
O
Address output to external DRAM.
http://www.xiaoyu163.com
2 9
8
Description
Q Q
3
6 7
1 3
1 5
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74
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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