Sony HCD-GTX66 Service Manual page 67

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• IC PIN DESCRIPTIONS
IC101 TC94A70FG-008 (S, D) (RF AMP, FOCUS/TRACKING ERROR AMP, DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO
PROCESSOR, DIGITAL FILTER, D/A CONVERTER) (BD91 BOARD)
Pin No.
1
2
3
4 SBAD/RFDC
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
TE
L 13942296513 21 IO1 (/UHSO)
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38, 39 BUS0, BUS1
40
41
42 BUCK (CLK)
43
44
www
45
46 AoUT3 (PO4)
47 AoUT2 (PO5)
.
48
49
50
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Pin Name I/O
AVSS3 — Ground pin
RFZi I RF ripple zero crossing signal input
RFRP O RF ripple signal output
Sub beam addition signal or RF peak detection signal output
O
Not used in this set. (Open)
FEi O Focus error signal output Not used in this set. (Open)
TEi O Tracking error signal output
TEZi I Tracking error zero crossing signal input
AVDD3 — Power supply pin (+3.3 V)
FOo O Focus coil drive signal output
TRo O Tracking coil drive signal output
VREF I Reference voltage (+1.65 V) input
FMO O Sled motor drive signal output
DMO O Spindle motor drive signal output
VSSP3 — Ground pin
VCOi I VCO control voltage input
VDDP3 — Power supply pin (+3.3 V)
VDD1 — Power supply pin (+1.5 V)
VSS1 — Ground pin
FGiN I FG signal input Not used. (Connected to ground.)
IO0 (/HSO) I Disc inner position detection signal input
O Not used in this set. (Open)
XVSS3 — Ground pin
XI I System clock input (16.9344 MHz)
XO O System clock output (16.9344 MHz)
XVDD3 — Power supply pin (+3.3 V)
DVSS3 — Ground pin
RO O Analog audio (R-ch) signal output
DVDD3 — Power supply pin (+3.3 V)
DVR O Reference voltage (+1.65 V) output
LO O Analog audio (L-ch) signal output
DVSS3 — Ground pin
VDDT3 — Power supply pin (+3.3 V)
VSS1 — Ground pin
VDD1 — Power supply pin (+1.5 V)
VDDM1 — Power supply pin (+1.5 V)
SRAMSTB I S-RAM standby mode control signal input Fixed at "L" in this set.
RST I Reset signal input from the system controller "L": reset
I/O Serial data input/output from the system controller or USB controller
BUS2 (SO) I/O Serial data input/output from the system controller or USB controller
BUS3 (SI) I/O Serial data input/output from the system controller or USB controller
I Serial data transfer clock signal input from the system controller or USB controller
CCE I Chip enable signal input from the system controller or USB controller
TEST I Setting pin for test mode Normally fixed at "L"
IRQ I Interrupt request signal input
O Request signal output to the USB controller Not used in this set. (Open)
x ao
y
O Audio data output to the USB controller
i
PIO0 O Request signal output to the system controller or USB controller
PIO1 O ST REQ signal output
PIO2 O Not used in this set. (Open)
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HCD-GTX66/GTX77
2 9 9 4 2 8
Pin Description
1 5 0 5 8 2 9 9 4
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9 9
2 8 9 9
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