Sony TA-F501ES Service Manual page 49

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Pin No. Pin Name
115
116 VDDEXT
117
118 VDDINT
119
120 VDDINT
121 XRESET
122 XSPIDS
123
124 VDDINT
125
126
127
128
129 VDDINT
130 VDDEXT
131
132
133
134 CLKOUT
TE
135
L 13942296513
136
137
138
139
140
141
142
143
144 VDDEXT
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I/O
GND — Ground
— Power supply (+3.3V)
GND — Ground
— Power supply (+1.2V)
GND — Ground
— Power supply (+1.2V)
I System reset signal input to the main system controller
I Serial data latch pulse signal input to the main system controller
GND — Ground
— Power supply (+1.2V)
SPICLK I/O Serial data transfer clock signal input/output with the flash memory
When DSP is master: Serial data input from the flash memory
MISO I/O
When DSP is slave: Serial data output to the main system controller
When DSP is master: Serial data output to the flash memory
MOSI I/O
When DSP is slave: Serial data input from the main system controller
GND — Ground
— Power supply (+1.2V)
— Power supply (+3.3V)
AVDD — Power supply (+3.3V)
AVSS — Ground
GND — Ground
— Not used (Open)
XEMU — Not used
TDO — Not used
TDI — Not used
CTRST — Not used
TCK — Not used
TMS — Not used
GND — Ground
CLKIN I System clock input terminal (25 MHz)
XTAL O System clock output terminal (25 MHz)
— Power supply (+3.3V)
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Pin Description
Q Q
3 6 7 1 3
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2 9 9 4 2 8
1 5 0 5 8 2 9 9 4
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TA-F501ES
9 9
2 8 9 9
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