4-4 DSC CIRCUITS (DSC UNIT)
4-4-1 DATA INTERFACE CIRCUIT
The control signals from DS-100 CLASS D/DSC TERMINAL
are shaped waveform at the SCHMITT circuit (IC3) via the
photo-coupler (IC2), and are then applied to the MAIN unit
via J2 (pin 11).
4-4-2 DSC MODULATION CIRCUT
The modulation signals from DS-100 are converted into a
600 Ω impedance at T1 and passed through the high-pass
filter (IC1a) with +6 dB/octave characteristics.
The signals from the high-pass filter (IC1a) are passed
through the splatter filter (IC1b) to suppress unwanted 3 kHz
or higher signals. The filtered signals are then applied to the
TX modulation circuit via the buffer amplifier (Q30) and ana-
log switch (IC12, pins 1, 2) on the MAIN unit as a DSC mod-
ulation signal.
4-5 POWER SUPPLY CIRCUITS
4-5-1 VOLTAGE LINE (MAIN UNIT)
LINE
The voltage from the connected DC power sup-
HV
ply.
Same voltage as the HV line which is passed
HVS
through the [PWR] switch (LOGIC unit; S1).
Same voltage as the HVS line which is passed
VCC
through the power controller (RL1).
Common 8 V converted from the VCC line at the
8V
8V regulator circuit (IC8).
Common 5 V converted from the 8V line at the
A5V
analog 5V regulator circuit (IC9).
Common 5 V converted from the 8V line at the
D5V
digital 5V regulator circuit (IC7).
Transmit 8 V controlled by the T8 control circuit
T8
(Q20, Q21) using the SEND signal from CPU.
Receive 8 V controlled by the R8 control circuit
(Q22, Q23) using the RCV signal from CPU. The
R8
controlled voltage is applied to the receiver cir-
cuits.
4-6 LOGIC CIRCUITS
4-6-1 MAIN UNIT
• MPU
IC16 is a 16 bit multifunction micro-computer and contains
FLASH memory, serial I/O, timer, A/D converter, D/A con-
verter, programmable I/O, ROM and RAM.
• SYSTEM CLOCK CIRCUIT
X3, X4 are crystal oscillators and oscillate 7.9872 MHz and
32.768 kHz system clocks for the MPU (IC16) respectively.
• RESET CIRCUIT
IC15 is a reset IC. When turn power ON, IC15 outputs a
reset signal ("LOW" pulse) to MPU (IC16, pin 75).
DESCRIPTION
• LOW BATTERY DETECTOR
VCC voltage is divided by R204, R205 and is applied to the
low battery detector section in the MPU (IC16, pin 42).
4-6-2 LOGIC UNIT
• CPU
IC1 is an 8 bit single chip micro-computer and contains LCD
driver, serial I/O, timer, A/D converter, programmable I/O,
ROM and RAM.
• SYSTEM CLOCK CIRCUIT
X1 is a ceramic oscillator and oscillates a 4.91 MHz system
clock for the CPU (IC1).
• LCD DRIVER
IC2 is a LCD driver for a dot matrix LCD.
• DIMMER CIRCUIT
CPU (IC1) and Q2, Q3, Q8 are dimmer circuit and control
the LCD backlight (LED).
• CONTRAST CIRCUIT
CPU (IC1) and Q1, Q4 are contrast circuit and control the 8
step display contrast.
4-7 PORT ALLOCATIONS
4-7-1 SUB CPU (LOGIC unit; IC1)
Pin
Port
number
name
27,
LRESET,
28, 29, 30
E, RW, RS
DB7–
31–38
DB0
42
SCAN
43
CHWX
44
CH16
46
SQLV
47
KEYM
DIALA,
51, 52
DIALB
54
SRXD
55
STXD
CONTSEG3–
58–60
CONTSEG1
61
DTRS
62
IC
63
DSC
64
HL
DIM3–
75–77
DIM1
CONDOT3–
78–80
CONDOT1
4 - 4
Description
Output ports for the LCD driver (IC2)
control signals.
I/O port for the LCD driver (IC2) control
signals.
Input port for the [SCAN] key.
Input port for the [DIAL] key.
Input port for the [CALL] key.
Input port for the squelch volume level.
Input port from the microphone (HM-
126) for remote control signal
Input ports for the [CHANNEL].
Outputs communication data for main
CPU (MAIN unit; IC16).
Input port for the communication data
from main CPU (MIAN unit; IC16).
Output port for the LCD contrast.
Input port for the [16] key.
Input port for the [DIMMER] key.
Input port for the [DUAL] key.
Input port for the [HI/LO] key.
Output LCD backlight control signal for
the dimmer circuit (Q2, Q3, Q8).
Output port for the LCD contrast.
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