Sony DVP-CX995V Service Manual page 86

DVP-CX995V
Pin No. Pin Name
63 H_SEL1
D_ADDR1 to
64 to 68
D_ADDR5
69 GND_IO3
D_ADDR0,
D_ADDR6 to
70 to 75
D_ADDR8,
D_ADDR10,
D_ADDR13
76 VCC_IO3
D_ADDR9,
77 to 79
D_ADDR11,
D_ADDR12
80 D_WEN
81 D_RASN
82 D_CASN
83 GND_IO4
84 GND_CORE2
85 VCC_CORE2
86 D_CLK
87 D_DQ5
88 D_UDQM
89 D_LDQM
90, 91 D_DQ7, D_DQ8
92 VCC_IO4
D_DQ4, D_DQ6,
93 to 98
D_DQ9 to D_DQ11
99 GND_IO5
D_DQ0 to D_DQ2,
100 to 105
D_DQ12 to D_DQ14
106 VCC_IO5
107 D_DQ15
108 DSD_PCM_0
109 DSD_PCM_1
110 DSD_PCM_2
111 DSD_PCM_3
112 GND_IO5
113 DSD_PCM_4
114 DSD_PCM_5
DSD_PCM_6,
115, 116
DSD_PCM_7
117 DSD_PCM_8
118 VCC_IO6
119
DSD_PCM_10
120 DSD_PCM_9
121 DSD_PCM_11
122 RESETN
123 H_A_SEL
124 to 128 H_A6 to H_A2
86
I/O
I
Host selection signal input terminal Fixed at "H" in this set
O
Address signal output to the SD-RAM
- Ground terminal
O
Address signal output to the SD-RAM
- Power supply terminal (+3.3V)
O
Address signal output to the SD-RAM
O
Write enable signal output to the SD-RAM
O
Row address signal output to the SD-RAM
O
Column address signal output to the SD-RAM
- Ground terminal
-
Ground terminal
-
Power supply terminal (+1.8V)
O
Clock signal output to the SD-RAM
I/O Two-way data bus with the SD-RAM
O
Write mask signal output to the SD-RAM (upper byte)
O
Write mask signal output to the SD-RAM (lower byte)
I/O
Two-way data bus with the SD-RAM
- Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM
-
Ground terminal
I/O
Two-way data bus with the SD-RAM
-
Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM
O
DSD data (for front L-ch) output to the D/A converter
O
DSD data (for front R-ch) output to the D/A converter
O
DSD data (for center) output to the D/A converter
O DSD data (for woofer) output to the D/A converter
-
Ground terminal
O
DSD data (for rear L-ch) output to the D/A converter
O
DSD data (for rear R-ch) output to the D/A converter
O
DSD data output terminal Not used
O
DSD clock signal output to the D/A converter
-
Power supply terminal (+3.3V)
O
DSD data output terminal Not used
O DSD data (for R-ch) output to the D/A converter
O
DSD data (for L-ch) output to the D/A converter
I
Reset signal input from the CPU "L": reset
I
Address signal input from the CPU
I Address signal input from the CPU
Description