Mitsubishi DS907x SIP User Manual page 69

WATCHDOG TIMER CONTROL BITS
Bit Description:
PCON.4:
"Watchdog Timer Reset"
Initialization:
Read Access:
Write Access:
PCON.2:
"Enable Watchdog Timer
Reset":
Initialization:
Read Access:
Write Access:
IP.7:
"Reset Watchdog Timer":
Initialization:
Read Access:
Write Access:
CRC MEMORY VERIFICATION
When using nonvolatile memory, there is always the
potential for a catastrophic event to alter the memory
contents. These events include lightning, massive ESD,
severe mistreatment, etc. No nonvolatile technology is
immune to these events. To compensate, the DS5001
series contains a CRC function that allows for automatic
verification of memory on power up. The CRC function
is also available to the user for application software use.
Note that this is not available on DS5000 series devices
[DS5000(T), DS2250T, DS5000FP].
If the CRC option is selected through the Bootstrap
Loader, then on power up or after a Watchdog Timer
WTR
Set to a 1 when a Watchdog Timer timeout occurs. If Watchdog Timer Reset
is enabled, this will indicate the cause of the reset. Cleared to 0 immediately
following a read of the PCON register.
Set to a 1 after a Watchdog Timeout. Cleared to a 0 on a No–V
Reset. Remains unchanged during other types of resets.
May be read normally anytime.
Cannot be written.
EWT
Used to enable or disable the Watchdog Timeout Reset. The Reset is
enabled if EWT is set to a 1 and will be disabled if EWT is cleared to a 0. This
bit affects the generation of a reset condition, not the running of the Watch-
dog Timer.
Cleared to a 0 on a No–V
other types of resets.
May be read normally anytime.
Can be written only by using the Timed Access register.
RWT
When set to a 1, the Watchdog Timer count will be reset, and counting will
begin again. The RWT bit will then automatically be cleared again to 0. Writ-
ing a 0 into this bit has no effect. This bit should be set prior to EWT, as the
timers are free–running.
Cleared to a 0 on any reset.
Cannot be read.
Can be written only by using the Timed Access register.
Power On Reset. Remains unchanged during
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reset, the microcontroller will automatically perform a
CRC–16 on the memory. The range over which it is per-
formed is selected by the user, and the result is
compared to a pre–stored value. If the CRC–16 is in
error, the DS5001 series microcontroller will enter the
Bootstrap Loader and wait. From the perspective of the
system, the appears held in a reset condition.
To support this function, the CRC register shown below
is accessible through the Bootstrap Loader. Setting the
CRC bit (LSB) enables the power–up CRC function.
The loader command "W" is used to write to this register.
The upper nibble of the CRC register (a hex value
between 0 and F) defines the address space in 4K
69
USER'S GUIDE
Power On
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