Section 13 Programmable Timers - Mitsubishi DS907x SIP User Manual

SECTION 13: PROGRAMMABLE TIMERS
FUNCTIONAL DESCRIPTION
The Secure Microcontroller incorporates two 16–bit tim-
ers called Timer 0 and Timer 1. Both can be used to gen-
erate precise time intervals, measure external pulse
widths, or count externally applied pulses.
Each programmable timer operates either as a "timer"
in which time periodic interrupts may be generated or as
a "counter", in which the timer register is incremented
when transitions are detected on an external input pin.
When a programmable timer is operating as a "timer",
the least–significant timer register is incremented once
every machine cycle or at 1/12 the frequency of the
clock oscillator. When a 12 MHz crystal is used, the reg-
ister will be incremented once every 1 s.
When "counter" operation is selected, the least–signifi-
cant timer register is incremented each time that a
1–to–0 transition is detected on the corresponding input
pin that may be assigned for the timer (T0 for Timer 0, T1
for Timer 1). These pins are the optional function of P3.4
and P3.5 respectively. The timing of the "counter" mode
is internally synchronized to the machine cycles. During
S5P2 of every machine cycle, the external input pin is
sampled. A 1–to–0 transition is defined as a 1 detected
during a machine cycle followed by a 0 detected in the
S5P2 clock phase of the next machine cycle. The new
count value in the timer register will be present during
TMOD REGISTER CONTROL BIT SUMMARY Figure 13–1
Bit Description
TMOD.7 (Timer 1);
TMOD.3 (Timer 0):
"Gate Control":
Initialization:
TMOD.6 (Timer 1);
TMOD.2 (Timer 0):
"Counter/Timer Select":
Initialization:
GATE
When set to 1 with TRns=1, timer/counter's input count pulses will only be
delivered while a 1 is present on the INT pin. When cleared to 0, counter
pulses will always be received by the timer/counter as long as TRn=1.
Cleared to 0 on any reset.
C/T
When set to a 1, the counter function is selected for the associated program-
mable timer; when cleared to 0, the timer function is selected.
Cleared to 0 on any reset.
clock phase S3P1 of the next successive (or third) ma-
chine cycle. See the section on timing for details.
The TMOD and TCON Special Function registers are
used to control the initialization of the two program-
mable timers. A summary of the bits contained in TMOD
is shown in Figure 13–1. The relevant TCON register
bits are depicted in Figure 13–2. Each Timer has four
control bits associated with it including C/T, GATE, M1,
and M0. C/T=1 selects counter operation and C/T=0 se-
lects timer operation.
A separate GATE bit in the TMOD register is provided
for each timer. These bits enable an associated external
interrupt input pin as a gating control for the timer or
counter function. The P3.2 (INT0) pin operates in con-
junction with Timer 0 while the P3.3 (INT1) pin operates
with Timer 1. When the Timer Run bit (TRn) and GATE
are both set to a 1, the timer or counter function will be
enabled only during the times that the associated inter-
rupt input pin is at a 1 level. When the Timer function is
selected, the GATE bit provides a means of measuring
the widths of logic 1 pulses applied to the interrupt pin in
units of machine cycles. When the counter function is
selected, the pulse is measured in units of 1–to–0 transi-
tions detected on the external counter input pin.
Both of the programmable timers have M1,M0 control
bits in the TMOD register which are used to select one of
the four operating modes described below.
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