Section 18 Troubleshooting - Mitsubishi DS907x SIP User Manual

Mitsubishi microcontroller user's guide
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USER'S GUIDE
SECTION 18: TROUBLESHOOTING
Dallas Semiconductor's Secure Microcontroller family
has proven itself to be a reliable and easy–to–use prod-
uct. As with any highly–integrated device, however,
questions and or problems can arise during its use and
development. Many of these stem from inadvertent at-
tempts to design with the Secure Microcontroller as
though it were exactly an 8051. To reduce these difficul-
ties, Dallas Semiconductor has gathered the common
problems in this section. These are the result of thou-
sands of application questions and represent the most
likely sources of trouble. The following section is orga-
nized by symptom, with suggested remedies. If these
fail, Dallas Semiconductor applications engineers are
available to assist you. The next section lists specific
do's and don'ts for designing with Secure Microcontrol-
lers. These are largely based on the default practices of
8051 and other microcontroller users.
UNEXPLAINED DEVICE RESETS
Several features in the device can cause a reset. Be-
cause many of these are unique to the Secure Micro-
controller Family, a traditional 8051 user may be
unaware of them.
1. Watchdog Timer. If the Watchdog Timer is enabled,
it will cause a reset every 122,800 machine cycles.
At 12 MHz, this is 122.8 ms. The Watchdog may be
operating even though it was never deliberately
enabled. If the Watchdog is not used, deliberately
disable it in software as part of the reset vector. If it
is used, the code may be missing an opportunity to
strobe the Watchdog leading to an accidental reset.
2. Power Supply Glitches. The Soft Microprocessor
monitors V
for a power failure. When power drops
CC
below its V
threshold, the microprocessor will
CCmin
reset. Good decoupling can eliminate resets due to
noise. A 10 F and a 0.1 F capacitor are reason-
able values, but actual selections depend on the
system. Note, be especially wary of synchronous
resets. That is, if every time an event occurs, the
microprocessor resets. The event (i.e., turning on a
motor ) could be causing a dip in V
3. Electrostatic Discharge. Most microprocessors will
loose control during a large static burst. The watch-
050396 163/173
Power–on reset
Watchdog reset
External reset
TIME MICROCONTROLLER READS THE
WRONG TIME
1. Shift register corruption of a DS1215 type clock.
2. Time is not changing. The timekeeper oscillator
RAM LOSES DATA WHEN POWERED DOWN
The lithium cell is drained. Under loading, the lithium cell
has insufficient capacity to create a voltage that sus-
tains data in the absence of power. This could occur if a
negative voltage (below –0.3V) has been applied to the
part on any pin. Look for undershoots on power or sig-
nals. Also, the power could have been applied in
reverse polarity or a DS5000(T) could have been
.
CC
plugged in backwards. If this happens to a module, the
part may still work, but will not retain memory. Note that
164
dog timer will catch an out of control processor. This
will appear as a watchdog timer reset.
During the debugging process, it may be necessary
to isolate the cause of an unexpected device reset.
Because resets are initiated by a limited number of
sources, it is relatively easy to determine their
source by interrogating a few bits. These bits should
be interrogated early in the code following a reset to
determine its source. As a debug tool, software
could set the state of one or more port pins to indi-
cate the type of reset to the designer. Note that
power supply problems or glitches will appear as
unplanned power–on resets.
SOURCE
When using a DS5000T or DS2250T and ECE2=1,
any MOVX will increment the clock pointer. If the
micro receives an interrupt while reading the clock,
a MOVX done as part of the ISR will alter the clock
pointer. Either disable interrupts while in the clock or
clear ECE2 as soon as an interrupt occurs.
must be enabled if the RTC is to be used. If the oscil-
lator is off, the time will remain as it was written.
POR BIT
WTR BIT
PCON. 6
PCON.4
0
0
0
1
1
0

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