Section 5 Memory Interconnect - Mitsubishi DS907x SIP User Manual

SECTION 5: MEMORY INTERCONNECT
The Secure Microcontroller family is divided between
chips and modules. This sections illustrates the
memory interconnect for the various chips and shows
block diagrams of selected modules. The Soft Micropro-
cessor chips are 80–pin QFP packages that connect to
low power CMOS SRAM. The SRAM connection is
made through the Byte–wide bus. When using a chip,
RECOMMENDED SRAMs FOR USE WITH SOFT MICROCONTROLLERS Table 5–1
RAM SIZE VENDOR
8K x 8 Dallas
8K x 8 Sharp
32K x 8 Hitachi
32K x 8 Mitsubishi
32K x 8 Sony
32K x 8 Sony
128K x 8 Hitachi
128K x 8 Mitsubishi
128K x 8 Sony
Recommended RAMs are given with the manufactur-
ers specified data retention current at 3V. Missing num-
bers are conditions unspecified by the manufacturer.
In the case of the DS5000FP, the microprocessor can
connect to either one or two SRAMs. They can be 8K by-
tes or 32K bytes, though the case of two 8K RAMs is un-
likely from a cost perspective. Figure 5–1 illustrates the
memory connection of a DS5000FP connected to one
32K x 8. CE1 provides the chip select, and R/W supplies
the WE signal. A second RAM could be added by simply
using CE2 as the chip enable with a common connec-
tion for the other signals.
DATA RETEN-
TION CURRENT
PART PART
NUMBER
DS2064
LH5168
HM62256LP–SL
M5M5256BP–LL
CXK58257AP–LX
CXK58527AP–LLX
HM628128LP–SL
M5M51008P–LL
CXK581000P–LL
49
the user must connect this Byte–wide bus to the RAM as
shown in this section. In module form, the bus is con-
nected inside the package. Table 5–1 shows some of
the preferred RAM choices. Note that any standard
SRAM will work, but data retention lifetime is dependent
on RAM data retention current and battery capacity.
Lower currents naturally allow the use of smaller batter-
ies. This is covered in detail in Section 6.
DATA RETEN-
TION CURRENT
25 C 40 C
0.05 A
–
– 3 A
1 A
1 A 2 A
0.3 A 0.6 A
1 A
1 A
1.2 A 2.4 A
In the case of DS5000 based modules including
DS5000(T) and DS2250T, the SRAM is connected as
described above. Connections running between the mi-
cro chip and RAM are not available at the pins. The
DS2250–64 has a second SRAM on CE2. The time-
keeping versions also have the real–time clock con-
nected to CE2. A block diagram in Figure 5–2 shows the
module configuration with 32K RAM and a real–time
clock. This is identical for DS2250 or DS5000 modules.
These are functionally identical and only differ in form
factor.
USER'S GUIDE
DATA RETEN-
TION CURRENT
70 C
– –
– 0.6 A
10 A
– 10 A
10 A
3 A
– 10 A
– 10 A
12 A
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