Basic Block Diagram - JAI SP-5000M-CXP2 User Manual

5.3.7.1

Basic block diagram

Soft Trigger
LVAL IN
FVAL IN
Exposure Active
Acquisition Trigger Wait
Acquisition Active
Frame Trigger Wait
Frame Active
User output 0
User output 1
User output 2
User output 3
Action 1
Action 2
GPIO 4 (TTL IN 1)
GPIO 5 (OPT IN 1)
GPIO 6 (OPT IN2)
GPIO 7 (Trigger Packet)
GPIO 10 (TTL IN2)
GPIO 11 (LVDS IN)
Pixel Clock
Note1: There are three pixel clocks available. Pixel clock is related to Link Configuration.
If Link Configuration is set, the appropriate pixel clock is automatically used.
Note2: Items written in blue are available only if Type 3 is selected for AUX connector.
SP-5000M-CXP2 / SP-5000C-CXP2
Sel Bit (5,0)
Cross Point
Switch
12 bit Counter
Fig. 6
- 18 -
Sel Bit (7)
INV Trigger 0 (Acquisition Start)
Trigger 1 (Acquisition Stop)
Trigger 2 (Frame Start)
Trigger 3 (Transfer Start)
Sel Bit (7)
INV
INV N
NAND
Sel Bit (7)
INV
Non INV
Pulse Generator 0
Pulse Generator 1
Pulse Generator 2
Pulse Generator 3
Pulse Gnerator
20 bit counter x 4
GPIO
GPIO 1 (TTL OUT 1)
GPIO 2 (OPT OUT 1)
OPT 3 (OPT OUT 2)
Time Stamp Reset
GPIO 8 (TL OUT 2)
GPIO 9 (TTL OUT 3)
CLR