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Q Q
3-7. SYSTEM CONTROL BLOCK DIAGRAM
3 7 6 3 1 5 1 5 0
MB-91 BOARD (6/8)
(SEE PAGE 4-29 to 4-34)
HA0 – 21
SIGNAL
PROCESS 1
(SEE PAGE 3-5)
IC107
HD0 –15
4
POWER ON
RESET
HA0, 1
RF/SERVO
(SEE PAGE 3-4)
HD8 – 15
X3VRST
CS2X
67
CS2X
SIGNAL
CS3X
68
CS3X
PROCESS 2
CS4X
69
CS4X
(SEE PAGE 3-7, 8)
DREQ1
46
DREQ1
DACK1
47
DACK1
RWSW
21
PH5
RF/SERVO
XDRVMUTE
23
DRVMUTE
T E
(SEE PAGE 3-4)
L
1 3 9 4 2 2 9 6 5 1 3
32
INT7
SDSPINT
22
ARPRST
ARPRST
AVINT
25
INT0
SIGNAL
ARINT
26
INT1
PROCESS 1
(SEE PAGE 3-5, 6)
FR 32PD
31
INT6
DREQ 0
43
DREQ 0
INTERFACE
IFBSY
29
INT4
CONTROL
XIFCS
45
IFCS
(SEE PAGE 3-17)
EUROV/Y
20
EUROV/Y
DISC/EXIT
17
DISC/EXIT
VIDEO 2
RGBSEL
7
RGBSEL
(SEE PAGE 3-11)
63
WIDE
WIDE
AFMSEL
57
PMUTE
AFMC
58
PRST
PSW
15
PSW
VIDEO 1
(SEE PAGE 3-9)
53
X1
X101
12.5MHz
54
X0
SI1
37
SI1
SO1
38
SO1
SC1
39
SC1
SC1
SIGNAL
PROCESS 1
SO1
61
48/44.1K
(SEE PAGE 3-6)
SI1
SC1
AUDIO
SO1
(SEE PAGE 3-15)
48/44.1K
SIGNAL
PROCESS 2
27M32
(SEE PAGE 3-7)
RF/SERVO
27MSDP
w w w
(SEE PAGE 3-4)
05
IC104 7
.
3.3 Vp-p (27 MHz)
+3.3V
5
SC0
4
SO0
5
SI0
6
1 – 5
85 – 100
74
33 35 36 28 48 49
102 – 109
111 – 118
120
CS0X
65
IC102 ua
71
CPUCK
70
CS5X
82
3.9 Vp-p (24.8 MHz)
RD
WRH
83
WRL
84
27
INT2
IC102
SYSTEM CONTROL
WAIT
79
XRST
16
IC102 tf
2.4 Vp-p (12.4 MHz)
IC104 q;
3.3 Vp-p (33.8 MHz)
1
SEL
CKINT
2
33M
10
IC104
7
27M2
PLL
33MARP
512FS
13
512FSAV
9
27M1
(SEE PAGE 3-5, 6)
512FSSA
x
a o
y
IC104 9
IC104 qd
i
3.3 Vp-p (27 MHz)
DVD: 3.3 Vp-p (24.58 MHz)
CD: 3.3 Vp-p (22.58 MHz)
3-13
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8
IC105
IC103
1M SRAM
16M FLASH
IC101
IC201 ol
EEPROM
CS
SK
CS
3
WC
DI
WC
8
R/B
3.9 Vp-p (24.8 MHz)
D0
R/B
1
CS, WE, UB, LB
WRH
RF/SERVO
(SEE PAGE 3-4)
RD
SDSPCS
RF/SERVO
CEMCDA
CE
(SEE PAGE 3-4)
CEMCDB
WE
CKPI
OE
Q
Q
3
7
6
3
RD
SIGNAL
WRH
PROCESS 1
(SEE PAGE 3-5, 6)
AVWT
45CTL
49CTL
DFRST
AUDIO
DFMODE
SIGNAL
(SEE PAGE 3-15)
XDFLAT
FBIWAIT
PROCESS 2
OSDWT
(SEE PAGE 3-7, 8)
CKINTO
SIGNAL
PROCESS 1
XRST
(SEE PAGE 3-5)
RF/SERVO
XRST
(SEE PAGE 3-4)
AUDIO
XRST
(SEE PAGE 3-15)
IC201 yd
SIGNAL
PROCESS 1
3.3 Vp-p (33.8 MHz)
u 1 6 3
.
http://www.xiaoyu163.com
2
4
9
9
8
SC0
INTERFACE
SO0
CONTROL
SI0
(SEE PAGE 3-17)
XFRRST
IC202
16M NAND FLASH
18
ı
21
I/O 0 – 7
24
88 – 96
77 – 84
ı
27
6
TEST, CLE, ALE,
ı
2
10
XWE, XWP,
8
ı
ı
XCE, XRE, R/B
66
5
15
40
20
ı
21
43
74
SDPCS
73
FG1A
72
FG1B
IC201
71
PH1
H2GA
99
FLDI
22
FLDO
CPUCK
2
HSYNCI
23
HSYNC
XCSI
1
5
1
5
0
8
9
2
4
3
27
RD
27MCK
27M
SIGNAL
5
WRH
OSDINT
28
OSDINT
PROCESS 2
4
WRL
FIDO
52
FIDOUT
(SEE PAGE 3-7, 8)
87
64
XINT
FBIINT
FBIINT
86
XWAIT
27MFBI
97
XRST
INV27I
49
27MAVD
AVCS
47
AVCS
AVREQ
44
AVREQ
34
45CTL
35
SMUTE
43
SMUTE
49CTL
SARST
42
SARST
36
DFRST
SAREQ
41
SAREQ
37
DFMODE
MSRDY
40
MSRD
38
DFLAT
IC201 td
MSLAT
39
MSLT
SIGNAL
VS0
53
VS30
PROCESS 1
HSO
54
HSYNCO
(SEE PAGE 3-5, 6)
XWCK
55
XWCK
3.1 Vp-p (V)
XWRFD
56
XWRFD
IC201 tf
ADOE
ADOE
57
WCK
58
WCK
WRFD
59
WRFD
DCKO
60
ADCK
3.2 Vp-p (H)
DVD: 3.2 Vp-p (36.7 MHz)
DCKI
61
SDCK
CD: 3.2 Vp-p (8.6 MHz)
ARREQ
IC201 y;,ya
ARREQ
66
ARPWT
65
ARPWT
ARPCS
67
ARPCS
VIDEO 2
3.2 Vp-p (4.23 MHz)
DSEL
29
DSEL
(SEE PAGE 3-11)
AFPCS
45
AFPCS
I2SO
31
I2SO
VIDEO 1
I2SCK
30
I2SCK
46
CKINT
(SEE PAGE 3-9)
VENCRST
VENCRST
19
63
33M
VOFF
VIDEO OFF
16
POWER 2
m
VIDEO OFF
(SEE PAGE 3-22)
c o
3-14
DVP-S9000ES
2
9
9
IC201 wd
3.2 Vp-p (H)
9
8
2
9
9
IC201 wj
IC201 rl
3.8 Vp-p (27 MHz)
3.7 Vp-p (27 MHz)
IC201 tk
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