System Control Block Diagram - Sony DVP-F25 Service Manual

DVP-F25

3-4. SYSTEM CONTROL BLOCK DIAGRAM

MB-106 BOARD (3/5)
(SEE PAGE 4-21)
HA 0 – 21 HAI0 – 21
HD 0 – 15 HDI0 – 15
XRD
XWRH
SIGNAL PROCESSOR
(SEE PAGE 3-5)
XARPIT
XARPCS
XWAIT
XRST
ROSW1
XRST
XSDPIT
XSDPCS
RF/SERVO
(SEE PAGE 3-4)
XDRVMUTE
XLDON
CMP
CMM
XAVDIT
DREQ0
DACK0
DREQ1
DACK1
XAVDCS2
XAVDCS3
TRST
SIGNAL PROCESSOR
(SEE PAGE 3-5)
33MARP
27MAVD
512FSAVD
16
IC106 or IC107
FLASH OTP
1 – 5 102 – 109 111 – 118 120 85 – 100 58
HA 0 – 21 HD 0 – 15
70 XRD
71 XWRH
17 INT1
62 CS4X
67 XWAIT
35 XRST
21 ROSW1
18 INT2
63 CS5X
IC104
48 XDRVMUTE
82 XLDON
SYSTEM
CONTROL
37 CMP
80 CMM
IC101
EEPROM
WP 7 7 WP
SCL 6 39 SCL
SDA 5 38 SDA
16 INTO
46 DREQ0
47 DACK0
49 DREQ1
50 DACK1
60 CS2X
61 CS3X
81
IC103
PLL
3
IC103 qg
14 FSEL
5.4Vp-p
29.5nsec
15 33-1OUT
3 27-1OUT
3-7
5
IC104 tf
X1
53
X101
16.5MHz
X2 54
WIDE 36
ROSW2
ROSW2 22
ROSW3
ROSW3 33
ROSW4
ROSW4 40
LVSW1
LVSW1 42
CKSW3
CKSW3 56
CKSW1
57
CKSW1
CKSW2
CKSW2 78
SI0 25
SO0 26
SCO 27
XIFCS 51
INT4 20
XFRRST 76
MAMUTE 83
SO1 29
SC1 30
XDACS 79
1
IC103 8
3.9Vp-p
37nsec
4
XTI
7
X102
27MHz
XTO 8
512-2OUT 9
512-1OUT 10
2 IC103 3
5.5Vp-p
37nsec
MD-89 BOARD (2/2)
(SEE PAGE 4-34)
CN201 (2/2)
ROSW2
11 11
ROSW3
10 10
ROSW4
9 9
LVSW1
2 2
CKSW1
1 1
CKSW2
4.0Vp-p
3 3
60.6nsec
CKSW3
4 4
CN101 (2/2)
CN604 (2/4)
WIDE
11
ROSW2
DSCRO2
ROSW3
DSCRO3
SI0
SO0
INTERFACE
SC0
CONTROL
XIFCS
(SEE PAGE 3-13)
XIFBUSY
XFRRST
INS
MAMUTE
SO1
SC1
XDACS
AUDIO
(SEE PAGE 3-11)
XRST
IC103 9q;
5.1Vp-p
40.8nsec
512FS2CH
3-8
S102
RSI
MD-90 BOARD
S103
(SEE PAGE 4-33)
REJ
S104
RLO
S301
LEV
CN103 CN301 S201
LVSW1
COF
2 4
CKSW1
1 5
CKSW2
4 2
S202
CKSW3
5 1
CRE
S203
CON
VIDEO
WIDE
(SEE PAGE 3-9)