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QUANTA QSSC-S99K 2U User Manual page 96

Multi-node system

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Code
Command
1Dh
Get DIMM
User
Information
72h
Set BIOS
Operator
Version
73h
Set BOOT Start Operator
74h
Set POST End
Operator
83h
Get BIOS
Operator
Version
F7h
Set T Control
N/A
Net Function = OEM (0xC0), LUN = 00
Privilege Level
Request, Response Data
Request :
Byte 1 — DIMM index, 1 base
Response :
Byte 1 – completion code
Byte 2~6 – same as byte 2~6of Set DIMM
Byte 7 – DIMM status
0x00 – Reserved
0x01 – Unknown DIMM type
0x02 – OK
0x03 – Not present
0x05 – Single bit error
0x07 – Multi bit error
Request :
Byte 1.10 – Same as previous command
response
Response :
Byte 1 – completion code
Request :
Response :
Byte 1 – completion code
Request :
Byte 1 — 0x05, no special meaning,
simply backward compatible
Response :
Byte 1 – completion code
Request :
Response :
Byte 1 —completion code
Byte 2.11 – BIOS version in human
readable format
Request:
Byte 1 – T Control value
Response:
Byte 1 – completion code
information
88
Chapter 4 — BMC
Description
Interface: ALL
Call by application which interest
on DIMM status
Interface: LPC
Called by BIOS before enter
INT19h
Interface: LPC by BIOS
In the very beginning of BIOS
post, but after the BIOS WD is
setup. In receiving this command,
BMC will stop watchdog timer. So
BIOS need to make sure to setup
BIOS WD first to avoid any gap in
between
Interface: LPC by BIOS
Right before BIOS enter INT19h,
BIOS shall use this command to
let the booting is successfully, at
least BIOS part, before call to this
command BIOS shall setup OS
Load WD timer first to avoid any
possible gap
Interface: ALL
Called by application in any
need.
For BIOS use only
BIOS will get T control value
offset from CPU and set it to
BMC. After BMC received this
value, BMC will add a base value
(50h) and make a new value for
fan speed control used.

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