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T POINT 3
TEST POINT 2
....
T
UPPER
...
HEAD
...
......
....
---..
I
READ AND HEAD
SIGNAL
SWITCHING
AMPLIFIER
~TES
...
CIRCUITS
....
LOWER
~
......
HEAD
...
TEST POINT 4
,
~
l+
.....
CROSSOVER
....
TIME DOMAIN
DIFFERENTIATOR
,
....
DETECTOR
r
FILTER
.....
.....
.....
TEST POINT 5
~
....
DIGITIZER
.....
DATA OUTPUT
NT WAT BUSY
-f
,.4~
UNIT SELECT _
Figure 3-11
Read Circuit Block Diagram
Circuit Description
When a two-sided diskette is installed, the signal IN1FF+ is generated and gated by U4 to enable the
low-going output Two Sided. The IN1 FF signal also goes to the ready circuitry at U6-5 to disable
Ready in the event that the upper head (Head 1) is selected when a single-sided (Head 0) diskette is
installed (see Option RM for further discussion).
3-14
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