Yamaha RX-V750 Service Manual page 87

A B C
SCHEMATIC DIAGRAM (CONVERSION)
1
2
Page 81 I-4
3
TO FUNCTION (2) CB512
4
COMPONENT
VIDEO
SELECTOR
AMP
0 0
5.0 5.0
0 0 –4.9 0
0 0 0 5.0
0 0 0
–4.9
0
0 0 5.0
0 0 0
–4.9
–4.9 0
0
0
0 4.9
5
6
0 5.0
0 0
0 0
0 0
0 0
0
7 –4.9 0
0 0
8
0 5.0
0
0
0 0
0
0 0
0
0 0
0
0
9
IC703 : NJM2581M
Video Amp
6dB 75
VIN1 1 14 V+1
AMP Driver
BIAS
NEE1 2 13 VOUT1
6dB 75
VIN2 3 12 V+2
AMP Driver
IC709 : TK15420MTL
BIAS Video Amp
VEE2 4 11 VOUT2
10
6dB 75
VIN3 5 10 V+3
AMP Driver
OUT 1 1 8 +V CC
BIAS
VEE3 6 9 VOUT3 –IN 2 7 OUT
1 2
+ – + –
+IN 3 6 –IN
1 2
PowerSave 7 REF 8 GND
–V CC 4 5 +IN 2
D E F
RX-V750/DSP-AX750/DSP-AX750SE
4.9 2.5 4.9
2.5
2.5 2.5 2.5 2.4 2.5 2.5 2.5 2.4
0 0 0 0
0 4.9 0 0 4.9 0 4.9 0 0
4.9
Y/C
SEPARATER
4.2
4.8 2.2 2.2
1.4 0
3.4
1.2
3.1 3.1
1.9
0.6
0 2.2
1.4
1.8 0
4.8 4.8
0 1.8
4.8 2.5
1.7 4.8
4.9 0
2.2
4.2
1.2
1.9 3.4
0.6
1.4
REGULATOR
18.9
18.9 9.0
0
18.2
0.1
4.9
0 REGULATOR
4.9
0
0.5
0
–4.9 –10.9
–10.9 –11.7
–2.7
Page 81 H-10 Page 86
TO FUNCTION (8) CB422 TO POWER (1) W352
IC706, 707 : TC74VHCU04FT
Hex Inverters
1A 1 14 V DD
IC713 : PQ05RD11
Rgulator
1Y 2 13 6A
2A 3 12 6Y
2Y 4 11 5A
VIN 1 2 VO
3A 5 10 5Y
I C
3Y 6 9 4A
4 CV
V SS 7 8 4Y
3
GND
G H
IC705 : TC90A49F
3 Line Digita Y/C Separatoy
AIN 5
CLAMP
X: NOT USED
O: USED / APPLICABLE
COMPONENT
CONVERSION
0 4.9
0 0
0
0
–4.9 4.9
4.9
0
4.9
0
1.1 2.6 0
1.1
4.9 4.4
3.4
4.9 4.4
0
1.5 9.0
0.1 9.0
5 6
8
3 0
4.8 0 3.3
1.1
1 0 2.4
0 2
0 5
0
0
7 6
–4.9
4
3.4
–3.3
–3.3
1H
DELAY LINE
I-3 IC708 : TC74HC4053AF (EL)
Analog Multiplexers/Demultiplexers
IC701, 702, 704 : TC74HC4052AF
Analog Multiplexers/Demultiplexers
INHIBIT VDD
6 16
A 11
A LEVEL BINARY TO 1-OF-4
10
CONVERTER DECODER WITH INHIBIT
B 9
VSS 8
VEE B
7 10
X0 12 SW
X1 14 SW
X
13 C
9
X2 15 SW
X3 SW
11
Y0 1 SW
INH 6
Y1 SW INHIBIT B A
5
0 0 0 0x, 0y
3 Y
0 0 1 1x, 1y
Y2 2 SW
0 1 0 2x, 2y
Y3 0 1 1 3x, 3y
4 SW
1 X X NONE
I J K
IC710 : TA8772AN
Delay System for Color TV or VCR
R-Y OUT
ANALOG
THROUGH MODE 30
VERTICAL EDGE
COLOR
ENHANCEMENT CIRCUIT
24 Y OUT x1 or x1/2
LINE LINE +
ADC Y-LPF Y DAC
MEMORY MEMORY
–
Pulse
C-BPF C-BPF C-BPF KILLER
Remove
20 C OUT
4 fsc DYNAMIC COMB FILTER C-BPF Trap C-LPF C DAC
8 fsc
1/2
PLL I 2 C BUS
15 17 11 12 13 14
CKIN FIL SDA SCL TEST KILLER
1
R-Y CLAMP
DET.
Page 80 A-1 Page 80 A-2
TO FUNCTION (6) CB403 TO FUNCTION (6) CB404
IC711 : TA1270BF
Sync Processing System
DAC2 Y OUT
38
ANALOG IN
Y OFFSET
DAC2
PHONO MM (DVD)
DAC1 39
DAC1
EQ AMP
8
11.4
3 0
CONTRAST
0
Y IN 40
2 0
1
PEDESTAL
CLAMP
DAC Vcc 41
(5V)
Y DL
42
C Vcc
(5V)
UV/CbCr SW 43
6
0
0
5
0 7
fsc OUT 44 fsc
–11.3
4
1H DL
1HDL CONT 45
CONTROL
SECAM
SECAM CONT 46
CONTROL
REGULATOR
7.0 11.8
47
B-Y/Cb OUT
CbCr / UV
SW
R-Y/Cr OUT 48
VCX0
1
4.43MHz M-X'tal
X'tal
–7.0 –11.7
IC831, 832 : BD3841FS
0 Function Switch
0
0
0
0 0
–7.0
0
0
0
32 31
7.0
0
0 0
0
0
LOGIC
0 0
INPUT
0 0
0
0
SELECTOR
0 0
F-SW1: INPUT FUNCTION 1
0
0 F-SW2: INPUT FUNCTION 2
0
0
0 0
0
0
1 2
ZONE 2
SELECTOR
VDD
16
14 X-COMMON
OUT C IN 12 OX
OUT C IN 13 IX
OUT C IN 2 OY
OUT C IN 1 IY
CONTROL INPUTS "ON" CHANNEL
OUT C IN OZ INHIBIT C B A 0X (Pin 12), 0Y (Pin 2), 0Z (Pin 5)
5
(Pin 6) (Pin 9) (Pin 10) (Pin 11) 1X (Pin 13), 1Y (Pin 1), 1Z (Pin 3)
L L L L 0X, 0Y, 0Z
OUT C IN 3 IZ
L L L H 1X, 0Y, 0Z
L L H L 0X, 1Y, 0Z
4 Z-COMMON L L H H 1X, 1Y, 0Z
L H L L 0X, 0Y, 1Z
L H L H 1X, 0Y, 1Z
15 Y-COMMON
L H H L 0X, 1Y, 1Z
L H H H 1X, 1Y, 1Z
H * * * NOTE
8 7 * Don't Care
VSS VEE
L M N
RX-V750/DSP-AX750/DSP-AX750SE
RX-V650/HTR-5760
B-Y CLAMP B-Y FROM R-Y FROM
B-Y OUT DET. R-Y IN B-Y IN MODE SW2 MODE SW1 CCD CCD GND VGG VOUT1 VDB1 VDB2 VOUT2
29 28 27 26 25 24 23 22 21 20 19 18 17 16
REF REF
Clamp Clamp LPF LPF
x1 or x1/2
AGC AGC AGC
Pulse Pulse
Det
Ins. Ins. S/H S/H
Pulse
Remove
Clamp Clamp
AGC
Det
CCD 1H CCD 1H
Ave
Bias
1/225
Pulse 225fH
Det Clock
HP. GP VCO
2 3 4 5 6 7 8 9 10 11 12 13 14 15
R-Y TO B-Y TO R-Y AGC VCC FILTER S.C.P. IN B-Y AGC PLL CLOCK CLOCK IN VSS VIN1 VDD VIN2
CCD CCD DET. ADJ. DET. DET.
I 2 C GND
GND DAC TEST SDA SCL Ys R-Y1 IN B-Y1 IN Y1 IN R-Y2 IN B-Y2 IN Y2 IN
37 36 35 34 33 32 31 30 29 28 27 26 25
DAC PEDESTAL PEDESTAL
I2C BUS Ys
SW TEST CLAMP CLAMP
CONTROL
24 SW GND
OFFSET
SW
SUB.
Y DL
HI : 2ch/LOW : 24h
23 ADRS SW
SW
22 R-V/R OUT
fsc
TRAP
21
SW B-Y/B OUT
YUV RGB SW
MATRIX
SYSTEM 20 Y/G OUT
CW
TINT
MATRIX
19 SW Vcc
(9V)
DEMO
18 SYNC Vcc
P/N ID (9V)
CHROMA
CP/HP
LPF / fsc BLK NOSE
17 CP/HP IN
TRAP DET IN
SW
16
Dig GND
TOF
BPF V
H. AFC H C/D V C/D
SEP
APC
15 SCP OUT
SYNC SCP
SEP
ACC 32fH
SUB
COLOR VCO
2 3 4 5 6 7 8 9 10 11 12 13 14
3.58MHz APC C GND C IN V-SEP SYNC SYNC H. AFC SYNC 32fH VD OUT HD OUT
X'tal IN OUT GND VCO
IC833 : NJM2068MD-TE2
Dual OP-Amp
OUT 1 8 +V
30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 CC
–IN 1 2 7 OUT 2
+ – + –
+IN 1 3 6 –IN 2
–V CC 4 5 +IN 2
3 4 5 6 7 8 9 10 11 12 13 14 15 16
Point t (Pin 3 of IC711) Point y (Pin 12 of IC711)
V : 2V/div, H : 100µsec/div V : 2V/div, H : 100µsec/div
DC, 1 : 1 probe DC, 1 : 1 probe
0V
0V
* All voltages are measured with a 10M Ω /V DC electronic volt meter.
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to
those originally installed.
* Schematic diagram is subject to change without notice.
Z
87