Hd-Dsp [Man - Hitachi DZ-BD7HA Service Manual

1 2
1F 2F
S-4 HD-DSP [MAN] ]
F
L2003
2.2
GND
L2000
C1.0V
BLM21PG221SN1D
C2056
1E 2E
0.01/16
C1.8V
C2057
To 0.01/16
T7
T8
REGULATOR
T9
C2000
(8D) T10 CORE_VCC39
0.01/16
T15 CORE_VCC40
T16 CORE_VCC41
T17 CORE_VCC42
L2001
C3V_SYS T18 CORE_VCC43
E 10 C2008 U7 CORE_VCC44
0.01/16
L2002 U8 CORE_VCC45
U9 CORE_VCC46
10
U10 CORE_VCC47
U15 CORE_VCC48
C3V_CAM
C2009 U16 CORE_VCC49
0.01/16
U17 CORE_VCC50
U18 CORE_VCC51
V7
V8
C2010
0.01/16
V9
V10 CORE_VCC55
V15 CORE_VCC56
C2011 V16 CORE_VCC57
0.01/16
V17 CORE_VCC58
V18 CORE_VCC59
A7
C2013
1D 2D
A14 I/O_VCC2
0.01/16
C2014
B7
0.01/16
B14 I/O_VCC4
C2015
F1
0.01/16
F2
C2016
H23 I/O_VCC7
0.01/16
H24 I/O_VCC8
C2017
R1 I/O_VCC9
0.01/16
R2 I/O_VCC10
C2018
U23 I/O_VCC11
0.01/16
U24 I/O_VCC12
C2019
AC10 I/O_VCC13
C2020 0.01/16
AD3 I/O_VCC14
D 0.01/16
AD10 I/O_VCC15
C2021
AD22 I/O_VCC16
0.01/16
AC16 ADIN_VCC1
AD16 ADIN_VCC2
2.5V
REG
G4
G3
G2
1C 2C
P2006
G1
GND
40
AD2[11]
AD2[11] 39
AD2[10]
AD2[10] 38
AD2[9]
AD2[9] 37
AD2[8]
AD2[8] 36
AD2[7]
AD2[7] 35
AD2[6]
AD2[6] 34
AD2[5]
AD2[5] 33
C AD2[4]
AD2[4] 32
AD2[3]
AD2[3] 31
AD2[2]
AD2[2]
30
AD2[1]
AD2[1] 29
AD2[0]
AD2[0]
28
GND 27
AD1[0]
AD1[0] 26
To AD1[1]
AD1[1] 25
AD1[2]
5MCMOS
AD1[2] 24
AD1[3]
AD1[3] 23
P1000
AD1[4]
AD1[4] 22
AD1[5]
AD1[5] 21
AD1[6]
1B AD1[6] 20 2B
AD1[7]
AD1[7] 19
AD1[8]
AD1[8]
18
AD1[9]
AD1[9]
17
AD1[10]
AD1[10] 16
AD1[11]
AD1[11]
15
GND 14
89.01or74.25M 13
L2005 BLM18PG330SN1D
CLOCKOUT 12
C2055
C1.8V
11
0.1/16
B C3V_CAM
10
C2054
C3V_CAM 9
0.1/16
HSYNC 8
* L2004
VSYNC
7
R2080 0
C3V 6
SDI
5 X2003
SC16-200
SCK 4
CS_CMOS 3
GND 2
R2077
CMOS_RESET
1 R2078 33
0
G7
R2076
G6 33
1A G5 2A
CMOS_RESET
CS_CMOS
A
SCK_2
SDO_2
To
CAMERA µP
(1E)
1 2
3
3F 4F
3E 4E
V12
V11
CORE_VCC38 CORE_GND67 U14
CORE_GND66 U13
CORE_GND65 U12
CORE_GND69 V12
T7 CORE_VCC36
V11 CORE_GND64 U11
T8 CORE_VCC37 CORE_GND68
T14
CORE_GND63
CORE_GND62 T13
T12
CORE_GND61
CORE_GND60 T11
CORE_GND59 R14
CORE_GND58 R13
CORE_GND57 R12
CORE_GND56 R11
CORE_GND55 P18
CORE_GND54 P17
CORE_VCC52 CORE_GND53 P16
VCC GND
CORE_VCC53 CORE_GND52 P15
CORE_VCC54 CORE_GND51 P10
I2000 CORE_GND50 P9
CORE_GND49 P8
HD-DSP
CORE_GND48 P7
CORE_GND47 N18
CORE_GND46 N17
I/O_VCC1 CORE_GND45 N16
3D 4D
N15
CORE_GND44
I/O_VCC3 CORE_GND43 N10
N9
CORE_GND42
I/O_VCC5 CORE_GND41 N8
I/O_VCC6 CORE_GND40 N7
CORE_GND39 M18
CORE_GND38 M17
CORE_GND37 M16
CORE_GND36 M15
CORE_GND35 M10
CORE_GND34 M9
CORE_GND33 M8
CORE_GND28 L15
CORE_GND32 M7
CORE_GND27 L11
CORE_GND31 L18
CORE_GND30 L17
CORE_GND29 L16
L15
L11
3C 4C
3B 4B
Y13 AD21
AA13 ADIN_EX2_11 ADIF_CKI AC20
Y8 ADIN_EX3_0 Y13 ADIN_EX2_10 ADIN_EX1_0 AD21 ADIN_EX0_11 AC8
AD8 ADIN_EX3_1 ADIN_EX0_10 AB7
AB8 ADIN_EX3_2 ADIN_EX0_9 AC7
AD9 ADIN_EX3_3 ADIN_EX0_8 AA7
AA8 ADIN_EX3_4 ADIN_EX0_7 AD7
AC9 ADIN_EX3_5 ADIN_EX0_6 Y7
AD_IF,TG
Y9 ADIN_EX3_6 ADIN_EX0_5 AA6
AB9 ADIN_EX3_7 ADIN_EX0_4 AB6
I2000
AA9 ADIN_EX3_8 ADIN_EX0_3 AC5
HD-DSP
AB10 ADIN_EX3_9 ADIN_EX0_2 AB5
Y10 ADIN_EX3_10 ADIN_EX0_1 AA5
AA10 ADIN_EX3_11 ADIN_EX0_0 AD5
AD2[11]
AA20 ADCK1 ADIN2_13 AB16
AD2[10]
AB20 ADCK2 ADIN2_12 AA16
TP2000
- AD2[9]
AA23 TGHR ADIN2_11 Y16
AD2[8]
Y24 HOBP ADIN2_10 AB15
TP2007
- AD2[7]
Y21 TGVR ADIN2_9 AC15
AD2[6]
ADIN2_8 AA15
AD2[5]
3A 4A
ADIN2_7 Y15
3
4 5
5F 6F
To To To
I/O CODEC CAMERA µP
(8F) (5F) (5F)
5E 6E
CPU_PLL
I2000
HD-DSP
R2072
Y22 RESET X2I E13
0
AB3 MPU_RESET M1
PCLK_DIVSEL1
AC3 X1O PCLK_DIVSEL0 M2
C2026
AC2 X1I L2
CPU_PLL_N1 C2027
0.01/16
Y5 AVDD_PL0 CPU_PLL_N0 L4 0.01/16
Y6 AGND_PL0 N5
AGND_PL1
AA4 XTAL_PLL AVDD_PL1 M5
AB4 XMODE CPU_CK_DIV M4
AC4 PLOCK CPU_CK_SEL M3
AD4 PLL_STANDBYN EX_CPUCK L1
5D 6D
TEST_PIN
5C 6C
Y1 AN7 E1
PORT5_4
AA1 AVREFP PORT5_3 F5
AA2 AVREFM PORT5_2 F4
C2042
AB1 AVDD_ADC PORT5_1 D2
0.01/16
AB2 AGND_ADC PORT5_0 D3
N1 PWM0 PORT4_3 T5
P1 PWM1 S_DI3_PORT4_2 T4
ARM_peri
P2 PWM2 S_DO3_PORT4_1 R5
T1 DA0 S_CK3_PORT4_0 R3
I2000
T2 DA1 DIF_VD_PORT3_6 B22
HD-DSP
U1 DA2 B23
DIF_HD_PORT3_5
U2 DA3 MNE2_PORT3_4 D13
C2043 5B 6B
T3 AVDD_DA0 MNE_PORT3_3 C13
0.01/16
TP2006
U3 AVDD_DA1 SYNC2_PORT3_2 B13
TP2005
U4 AGND_DA1 SYNC1_PORT3_1 A13
INT1_PORT2_5 L5
U5 AGND_DA0 S_LD_PORT3_0 P3
INT0_PORT2_4 J2
D1 EXT_CPU INT3_PORT2_7 L3
N4 SCI_MODE INT2_PORT2_6 K3
L5
J2
5A 6A
L20 SD_CKE SD_DQ_15
N22
M20 SD_CSN SD_DQ_14 N20
SD_DQ_13
M21 SD_CASN P22
M22 SD_CK SD_DQ_12 P23
M23 SD_WE SD_DQ_11 P21
M24 SD_RASN SD_DQ_10 P24
N21 SD_DQM1 SD_DQ_9 P20
R22 SD_DQM0 SD_DQ_8 R23
U21 SD_BA1 SD_DQ_7 R21
U22 SD_BA0 SD_DQ_6 R20
Y23 SD_ADR_0 SD_DQ_5 R24
W20 SD_ADR_1 SD_DQ_4 T22
W21 SD_ADR_2 SD_DQ_3 T23
W24 SD_ADR_3 SD_DQ_2 T21
W22 SD_ADR_4 SD_DQ_1 T20
W23 SD_ADR_5 SD_DQ_0 T24
V20 SD_ADR_6 SD_ADR_11 U20
V21 SD_ADR_7 SD_ADR_10 V23
V24 SD_ADR_8 SD_ADR_9 V22
I2000
HD-DSP
SDRAM_IF
4 5
S - 4
6 7
7F 8F
The following shows the neme of circuit and plug to
which signal is connected and the address:
Name of citcuit
To MAIN
diagram
VIDEO
(3A)
Address
PG1001
Name of citcuit
To MAIN
diagram and plug AUDIO-L 1
PG2001
AUDIO-R 2
Address (3A)
Note: For parts whose circuit numbers are marked *,
the values and whether they are mounted vary
7E 8E
depending on the model/destination.
See "Parts Search System" to check for the values
and whether they are mounted.
One voltage : PB or REC mode.
Two voltages : PB and (REC) mode.
Digital_IF
TP2008 TP2009
VIDEO_IF I2000
HD-DSP
X2001
SC16-200
DV1_CKIN X2002
DV2_CKIN SC16-200
7D F20 DIFCK1 8D
DV1_DOUT[7]
E21 DIFCK2 DIF3_7 C22
DV1_CKOUT DV1_DOUT[6]
C21 DIFCK3 DIF3_6 C24
DV1_DIN[0] DV1_DOUT[5]
H22 DIF1_0 DIF3_5 C23
DV1_DIN[1] DV1_DOUT[4]
G24 DIF1_1 DIF3_4 E20
DV1_DIN[2] DV1_DOUT[3]
H20 DIF1_2 DIF3_3 D20
DV1_DIN[3] DV1_DOUT[2]
H21 DIF1_3 DIF3_2 D22
DV1_DIN[4] DV1_DOUT[1]
G23 DIF1_4 DIF3_1 D23
DV1_DIN[5] DV1_DOUT[0]
G20 DIF1_5 DIF3_0 D21
DV1_DIN[6] DV2_DIN[7]
G21 DIF1_6 DIF2_7 D24
DV1_DIN[7] DV2_DIN[6]
G22 DIF1_7 DIF2_6 E22
DV2_DIN[0] DV2_DIN[5]
F24 DIF2_0 DIF2_5 E24
DV2_DIN[1] DV2_DIN[4]
F21 DIF2_1 DIF2_4 E23
DV2_DIN[2] DV2_DIN[3]
F22 DIF2_2
DIF2_3 F23
7C 8C
P_DATA[11]
B3 D6
P_DATA[12]
C3 P_DATA_12 P_ADR_17 C6
B3 P_DATA_11 P_ADR_18 D6
P_DATA[13]
B2 P_DATA_13 P_ADR_16 E7
P_DATA[14] P_ADR[15]
D4 P_DATA_14 P_ADR_15 D7
P_DATA[15] P_ADR[14]
C1 P_DATA_15 P_ADR_14 C7
ARM_IF
P_ADR[13]
TP2004
E16 CCD_SYNC P_ADR_13 D8
P_ADR[12]
TP2003 I2000
D16 SSG_SYNC_SSG_FP P_ADR_12 B8
TP2002 P_ADR[11]
HD-DSP
E15 SSG_FV P_ADR_11 C8
P_ADR[10]
TP2001
B17 SSG_HD_LCD_HD P_ADR_10 E8
P_ADR[9]
7B 8B
C16 OSD_CLK_MONI_CLK P_ADR_9 A8
P_ADR[8]
P_ADR_8 D9
7A 8A
P2000 P2001 P2004 P2005

HD-DSP [MAN]

6 7
8
F
E
D
DV1_CKIN
DV1_DIN[0-7]
To
DV2_CKIN
CODEC
DV2_DIN[0-7]
DV1_CKOUT (6A)
DV1_DOUT[0-7]
To
B_OUT
G_OUT
PLUG
R_OUT
SSG_HD (1A)
SSG_FV
P_DATA[0-15]
To
P_ADR[1-15]
CAMERA µP
CS_DSP
WE_DSP (5F)
OE_DSP C
B
To
LENS DRIVE
LENSCK
(8B)
To
SSG_SYNC
CCD_SYNC
CAMERA µP
EP3
XVR (5F)
To
SSG_SYNC
CCD_SYNC CODEC
(5A)
A
8