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EV8OC196KB Microcontroller Evaluation Board User's Manual -239
OVERVIEW
Embedded Controller Monitor (ECM)
An ECM (Embedded Controller Monitor) provides basic debug capability and is
installed in your target system. Capabilities include loading object files into system
RAM, examining and modifying variables, executing code, and stepping through
code. In the past, most of these monitors have been configured to run with a stan-
dard "dumb" CRT with some form of auxiliary port for loading and saving object code
from a host system.
It is now common for a personal computer to act as the host for
program translation and also emulate a dumb CRT during user interaction with the
ECM. The ECM developed for the MCS-96 family makes the assumption that the
user interface will always be a personal computer; no provision is made for interface
to a dumb CRT. By making this assumption it is possible to reduce the size and
complexity of the code that must be installed in the target system. A term' has been
coined for this code resident in the target -- RISM. The term RISM stands for Re-
duced instruction Set Monitor and is an obvious takeoff of the term RISC (Reduced
Instruction Set Computer) used to describe a class of computer architectures.
The
RISM consists of about 300 bytes of MCS-96 code which provide primitive opera-
tions. Software running in the host uses the RISM commands to provide a complete
user interface to the target system. The advantage of this approach is that the ECM
can be readily adapted to different target systems and requires only a small part of
the available target memory space. The disadvantage is that the user interface
must be provided by a personal computer.
The structure of the RISM is a short section of initialization code and an interrupt
service routine (ISR) that processes interrupts from the host system. The RISM ISR
consists of a short prologue and then a case-jump to one of 20 to 25 command
executors.
These executors are simple and short; the flow though the entire ISR
(including the prologue) is 15-20 instructions. The serial communication occurs at
9600 baud, which limits the frequency of these interrupts to 1 Khz. In the worst case
the EV80C196KB board will be slowed by the execution of a fairly short RISM ISR
every millisecond while executing user code. It is possible to operate the
EV80C196KB board so that no real-time is lost to the iECM-96 unless the user is
actively interrogating the target. (See the section "Initiating and Terminating the
iECM-96" and the description of the RISM REPORT-STATUS
command for details
on this).
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