Advertisement
MCS-96
MACRO
ASSEMBLER
EV96
01/24/89
13:55:41
PAGE
18
ERR LOC
OBJECT
A200
A200
A200
910116
A203
OllC
A205
0122
A207
OllE
A209
1lOF
A209
A1002820
A20F
A20F
C62OlC
A212
9A211C
A215
D71C
A217
301E04
A21A
151C
AZlC
2002
A21E
A21E
171C
A220
A220
89008020
A224
D7E9
A226
A1002820
A22A
071E
A22C
170F
A22E
BOOF17
A231
27DC
A233
A233
AlFFFF22
A237
27FE
:.iNE
78 1
388
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
iOURCE
STATEMENT
cseg
at
(offset
t 2200H)
mem tst:
-
------
; This
is a RAM test
for the EV80C196KB
board
in its
'shipped'
configuration.
; The RAM
from
2000H
to 27FFH
is not mapped
during
diagnostics,
and therefore,
; is not tested.
The test
alternates
between
incrementing
and decrementing
; the test
data
on even
and odd cycles
of the test
so that
a nonrepetitive
; pattern
is produced
in memory.
; ---
;
loop:
i
here:
----
ldb
clr
clr
clr
clrb
Id
stb
cmpb
bne
bbc
decb
br
inch
around:
cw
bne
Id
inc
inch
ldb
br
failed:
Id
br
Seject
.-----------_
iocl,
#OlH
ax
CX
dx
ioportl
bx,
t2800H
al,
[bxl
al,
[bx]+
failed
dx.0,
here
al
around
al
bx,
#8000H
loop
bx, t2800H
dx
ioportl
pwm-control,
loop
CX,
#OFFFFH
s
.-.
; enable
PWM
; clear
data
register
; clear
error
register
; clear
test
count
register
: starting
address
of RAM
in diag.
mode.
; save
test
data
; check
if it is saved,
and point
to next
byte
; if not,
test
failed
; check
if test
count
is even
or odd
; if it is odd,
decrement
test
data
; if it is even,
increment
test
data
i has end of RAM been
reached
by pointer?
; is not continue,
; else,
return
pointer
to starting
address
; count
the test
as successful
i show
completion
to user
on LEDs
ioportl
; PWM LED gets
brighter
as ioportl
; value
gets
bigger
i go back
for another
cycle
; set error
register
: end test
Advertisement
