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EV80CI 96KB Microcontroller Evaluation Board User's Manual
ASSEMBLY AND DISASSEMBLY
iECM-96 supports the examination and modification of code memory using the
standard mnemonics for the MCS-96 assembler (ASM-96). Although standard
mnemonics are used, the iECM-96 does not build a symbol table of user symbols as
assembly mnemonics are entered. This makes it a single-line assembler (SLA)
because references are never made to information entered on other lines. No labels
are generated by the SLA, although it canuse labels which are loaded as symbolic
information along with object code when a file translated in the debug mode has
been loaded. The iECM-96 SLA will accept mnemonics for all instructions which can
actually be executed by the target processor. It will not accept "generic" instructions
such as BE or CALL which are processed by ASM-96 into standard MCS-96 instruc-
tions: It will accept JE and SCALL or LCALL which are the specific instructions the
MCS-96 processors understand.
SLA (Single Line Assembly) Commands
The commands which invoke the SLA are:
I44; <code-address>
The SLA is useful for writing short code pieces on-line for testing or patching pro-
rams
9
but is not intended as a replacement for a true assembler such as ASM-96.
he SLA can be invoked whether or not user code is running, but there is an obvi-
ous danger in modifying code that is being executed.
ASM <code-addr>
This command causes the iECM-96 software to enter the SLA mode. The assembly
program counter (APC) will be set to <codeaddr> and lines of "assembly language"
entered by the user will be converted to object code and loaded into the target's
memory. iECM-96 will complain if erroneous inputs are made but will remain in the
SLA mode. This mode is terminated by entering the only "directive" understood by
the SLA: END.
ASM
This command operates identically to the ASM <code-addr> command except that
the APC is not initialized. If this is the first time that the SLA has been used then
APC will be set to 2080H, if it is not then APC will point at the byte following the last
instruction generated by the SLA.
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