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Intel EV80Cl96KB User Manual page 67

Microcontroller evaluation board

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MCS--96 MACRO
ASSEMBLER
EV96
ERR LOC
OBJECT
A000
A000
0040
A002
0041
A004
0042
A006
0043
A008
0044
AOOA
0045
AOOC
0046
AOOE
0047
A010
3BlD
A012
0048
A018
A018
FF
A030
A030
0049
A032
004A
A034
0048
A036
004C
A038
004D
A03A
004E
A03C
004F
A03E
0000
LINE
254
255
156
251
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
213
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
01/24/89
13:55:41
PAGE
8
iOURCE
STATEMENT
cseg
at
(offset
+ 2000H)
_________-----------
-_--
;
Interrupt
service
routine
addresses
to be used
in RiSM
EPROM.
; Note:
;
Of all these
interrupt
vectors,
only
the NM1 and TRAP
vectors
are required
i
for operation
of the RISM.
The other
vectors
are provided
as fixed
entry
;
points
for routines
which
may be loaded
into RAM
in the diagnostic
mode.
i
In the diagnostic
mode
memory
at the
interrupt
vectors
is mapped
to EPROM
i
so it is not possible
to write
into
the vector
table.
:
;
(In the normal
(i.e. non-diagnostic
mode)
the
interrupt
vector
table
is
i
mapped
to RAM so the vectors
can be loaded
as part
of the normal
process
;
of loading
a user's
object
code.
timer-overflow:
dew
4000H
ad done:
dew
4100H
h.sT data:
dew
4200H
hso-event:
dew
4300H
hsilzero:
dew
4400H
software-timer:
dew
4500H
serial-port:
dew
4600H
external-int:
dew
4700H
trap:
dew
(break-offset)
invalid-opcode:
dew
4800H
;
cseg
at
(offset
t 2018H)
;
____________--______----
;
chip-config:
dcb
OFFH
; Enable
no CCB modes
cseg
at
(offset
+ 2030H)
;
_----_______--______----
i
serial-txd:
serial-rxd:
hsi-entry-4:
timerZ_capture:
timer2-overflow:
external-int-pin:
hsi-fife-full:
nmi:
$eject
dew
4900H
dew
4AOOH
dew
4BOOH
dew
4COOH
dew
4DOOH
dew
4EOOH
dew
4FOOH
dew
(rism-isr-offset)
-.
-.--..-. ..-.. -. --

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