Patch Area Architecture - Sundance Spas SMT327 User Manual

Compact pci 4 slot motherboard
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Preliminary

4. Patch Area Architecture.

The layout of the SMT327 is shown below. Two patch areas, upper and lower, allow each pair of TIM's to be interconnected.
Between these areas, three routing channels are provided to allow additional communication port connections between each
pair of TIM's.
Each patch area has 3 front panel FMS connectors that allow a communication port to be buffered to a front panel connector.
Buffered communication ports can be used between SMT327 boards or other compatible systems at distances up to 0.8m.
The diagram below details the layout of the TIM slots and potential routing of the flat flexible cables.
Document Name:
User Guide
Product Name:
SMT327
Author:
Bill Blyth
Page 7 of 7
T3C3-I
T3C0-O
TIM 3
TBC
T3C4-I
T3C1-O
Tunnel A
T2C3-I
Tunnel A
Tunnel B
T2C0-O
TIM 2
T2C1-O
T2C4-I
Figure 2 Patch Area Layout
Issue : 01
Revision Date:
Original Date:
T4C3-I
T4C0-O
TIM 4
Tunnel B
T3C4-I
T4C1-O
Tunnel C
T1C3-I
Tunnel C
T1C0-O
J2
TIM 1
J1
T1C1-O
T1C4-I
SMT327 User Guide
Rev 02
8 August, 2000
30 April 1998

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