Ether Interface Block Diagram - Sony DCM-M1 Service Manual

3-13. ETHER INTERFACE BLOCK DIAGRAM

ETHER BOARD (2/2)
(SEE PAGE 4-109)
D0 – D7
CN8801 (2/2)
1
I
4
•
6
I
9
DO – D15
K
• D8 – D15
11
I
TO SYSTEM CONTROL
13
•
(SEE PAGE 3-16)
15
I
19
RD&WT
31
21
A0 – A3
A0 – A3
I
24
SBHE_CE2B
27
DQMUU_ICIOWR
28
DQMUL_ICIORD
29
CS6_ETHER
26
ETHER_INT
33
ETHER_WAIT
34
ETHER_PWR
36
ETHER_RESET
G
32
TO MPEG ENCODE
(SEE PAGE 3-10)
05
LEVEL SHIFT
IC8801
14 B0 A0 3
SD0 – SD7
I I I I
21 10
B7 A7
T/R OE
2 22
LEVEL SHIFT
18
IC8802
I
23
•
25
•
14 3
B0 A0 27
I I SD8 – SD15 I SD0 – SD15
I I
21 B7 A7 10 29
•
85
•
87
T/R OE
I
91
2 22
LEVEL SHIFT
IC8803
14 B4 A4 7 4
I I I I SA0 – SA3 I SA0 – SA3
17 B7 A7 10 7
BHE
19 B2 A2 5 11
IOW
20 B1 A1 4 17
IOR
21 B0 A0 3 15
ECS
18 B3 A3 6 82
OE
22
LEVEL SHIFT
IC8805
INT
14 B7 A7 10 92
READY
15 B6 A6 9 3
OE
22
LEVEL SHIFT
IC8804
HWRST
14 B7 A7 10 64
3-25
ETHER INTERFACE
IC8806
DATA BUS
ADDRESS BUS
CLKO
61
CLKI
62
34
DATA BUS BD0 – BD7
41
42
45
47
50
ADDRESS BUS BA0 – BA14
53
56
58
60
BCS
30
BWE
32
BOE
33
ETHER ADAPTER
PULSE TRANSFORMER
(2/2)
IC8807
CN8802
(2/2)
TPIP RD+
71 3 13 7
TPIN RD–
72 1 14 8
TPOPA
77 7
TD+
8 9
TPOPB
78 6
TPONA
79 5
TD–
TPONB 9 10
80 4
1.28 Vp-p
20 MHz
REC/PB
X8801
20MHZ
SRAM
IC8808
18
l
20 I/O1
l BD0 – BD7 • l
22 I/O8
l
26
l
2
•
l
5
l
• A0
BD0 – BA14 8
• l
A14
l
17
•
28
•
l
27 CE
6 WE
1 OE
3-26
DCM-M1
10BASE-T