Diagram B10A, Isp1562Be (Ic 7N00) - Philips Q528.1E Service Manual

EN 154 9. Q528.1E LA

9.10.10 Diagram B10A, ISP1562BE (IC 7N00)

Block Diagram
PME#
PCICLK
32
AD[31:0]
C/BE#[3:0]
REQ#
GNT#
IDSEL
INTA#
FRAME#
DEVSEL#
IRDY#
CLKRUN#
PAR
PERR#
SERR#
TRDY#
STOP#
RST#
V
CC(I/O)
V
I(VREG3V3)
REG1V8
XTAL1
XTAL2
Pin Configuration
Circuit Descriptions, Abbreviation List, and IC Data Sheets
99
7
10, 12 to 15, 20 to 22,
26 to 31, 33, 34,
50 to 54, 56, 57,
PCI CORE
59, 62, 63, 65 to 70
23, 35, 48, 60
9 PCI MASTER
8
24
PCI SLAVE
4
36
39 CONFIGURATION SPACE
37
CONFIGURATION FUNCTION 0
42
47 CONFIGURATION FUNCTION 1
44
CONFIGURATION FUNCTION 2
45
38
CORE
RESET_N
41
5
11, 25, 40,
POR
55, 71
16
V
CC
VOLTAGE
CORE
18, 43, 58
REGULATOR
V
CC(I/O)
DETECT
74
XOSC
75
PLL
86, 93
V
DDA_AUX
GNDA 1
AUX1V8 2
V 3
I(VAUX3V3)
INTA# 4
RST# 5
6
GNDD
7
PCICLK
8
GNT#
REQ# 9
AD[31] 10
V 11
CC(I/O)
AD[30] 12
AD[29] 13
AD[28] 14
AD[27] 15
V 16
I(VREG3V3)
GNDA 17
REG1V8 18
GNDD 19
AD[26] 20
21
AD[25]
22
AD[24]
23
C/BE#[3]
IDSEL 24
V 25
CC(I/O)
Figure 9-32 Internal block diagram and pin configuration
SCL SDA
96 97
GLOBAL CONTROL
ISP1562
OHCI OHCI
(FUNCTION 0) (FUNCTION 1)
RAM RAM
PORT ROUTER
ATX1 ATX2
ORIGINAL Hi-SPEED ORIGINAL
USB ATX USB ATX USB ATX
78 79 83 85 87 88
OC1_N DM1 DP1 OC2_N
PWE1_N PWE2_N
ISP1562BE
77, 98, 100
V
CC(I/O)_AUX
VOLTAGE
3
REGULATOR V
I(VAUX3V3)
(V )
aux
2, 73
AUX1V8
V core
aux(1V8)
EHCI
(FUNCTION 2)
81
RREF
RAM
1, 17, 46,
61, 72, 80,
82, 84,
89, 91
GNDA
6, 19, 32,
Hi-SPEED
49, 64, 76,
USB ATX
94, 95
GNDD
90 92
DM2 DP2
75 XTAL2
74 XTAL1
73 AUX1V8
72 GNDA
71 V
CC(I/O)
70
AD[0]
69
AD[1]
68
AD[2]
67 AD[3]
66 AD[4]
65 AD[5]
64 GNDD
63 AD[6]
62 AD[7]
61 GNDA
60 C/BE#[0]
59 AD[8]
58 REG1V8
57 AD[9]
56 AD[10]
55
V
CC(I/O)
54
AD[11]
53
AD[12]
52 AD[13]
51 AD[14]
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