Diagram B05, Pnx5050 (Ic 7C00) - Philips Q528.1E Service Manual

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.10.7 Diagram B05, PNX5050 (IC 7C00)

Block Diagram
SD video ITU-R BT.656
HD video YUV
4 : 2 : 2
HD / PC YUV /
RGB 4 : 4 : 4
2
I S-bus audio
SPDIF audio
2
I C-bus
27 MHz
GPIO
Pin Configuration
MAIN MEMORY
4 : 2 : 2 VIDEO IN
ROUTER
4 : 4 : 4 VIDEO IN
AUDIO IN
SPDIF IN
2
I C
BOOT, RESET,
CLOCKS
MISCELLANEOUS
I/O,
TIMERS,
COUNTERS
INSTR
300 MHz
CACHE
32-BIT
DATA
CPU
CACHE
AF
AE
AD
AC
AB
AA
Y
W
V
U
T
R
P
N
M
L
K
J
H
G
F
E
D
C
B
A
1 3 5 7 9 11 13 15 17 19 21 23 25
2 4 6 8 10 12 14 16 18 20 22 24 26
Figure 9-29 Pin configuration
Q528.1E LA
DDR SDRAM
PNX5050
INTERFACE
PICTURE
IMPROVEMENT
IMAGE
COMPOSITION
AUDIO OUT
SPDIF OUT
SCALER,
DEINTERLACER
2D DRAWING
ENGINE
XIO INTERFACE
9.
LCD 24-bit RGB/
OUTPUT 30-bit RGB
2
I S-bus audio
SPDIF audio
FLASH
MEMORY
H_16800_129.eps
090507
EN 151