Circuit Descriptions, Abbreviation List, And Ic Data Sheets; Features; Tv520 Architecture Overview; Index Of This Chapter - Philips Q528.1E Service Manual

EN 122 9. Q528.1E LA

9. Circuit Descriptions, Abbreviation List, and IC Data Sheets

Index of this chapter:

9.1 Introduction
9.2 Display Supply
9.3 On-Board Platform Supply
9.4 On-board DC/DC Converters
9.5 Front-End
9.6 PNX8535
9.7 Back-end
9.8 Ambient Light
9.9 Abbreviation List
9.10 IC Data Sheets
Notes:
• Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (chapter 6) and
circuit diagrams (chapter 7). Where necessary, you will find
a separate drawing for clarification.
9.1 Introduction
This chassis (development name "TV520") is the successor of
the BJx.x and FJx.x chassis (development name "Jaguar").
The platform is built around the PNX8535 "System on Chip"
(SoC), which performs the video and audio processing. The
SoC integrates the functionality of ICs that were previously
used in the Jaguar platform: PNX2015 (AVIP/COLUMBUS),
PNX3000 (MPIF), TDA9975 (HDMI receiver), T6TE0TBG
(SPIDER), and PNX8550 (VIPER).
TDA10048
TD1716
Tuner/Saw
DVB-T
MASTER IF
MUX
max. 3 HDMI
Circuit Descriptions, Abbreviation List, and IC Data Sheets
DDR-II DDR-II DDR
PNX8535 PNX505x
MIPS32@250MHz HD-NM,
TV Control, Clear LCD 100 Hz
Audio/video decoding OR
Analog and digital Upconversion to
Platform Picture quality, 1080p q 50Hz
Scaling
8
FLASH
Audio Amp.
Figure 9-1 Architecture of TV520 platform
Remaining additional key components in this chassis are:
• PNX5050.
• PACIFIC 3 (T6TF4HFG).
9.1.1

Features

The main features for this chassis are:
• 1080p resolution @ 50 Hz (in some sets)
• Perfect Pixel HD Engine as the successor of Pixel Plus.
With this technology, each pixel of the incoming picture is
enhanced to better match the surrounding pixels, resulting
in a more natural picture. Artifacts and noise in all sources
from multimedia to standard TV to highly-compressed
high-definition (HD) are detected and reduced. This results
in a clean and razor sharp image.
• The introduction of LED AmbiLight.
• ClearLCD, a technology that uses scanning and backlight
dimming technology to reduce the motion blur on an LCD
screen, caused by the slow response time and the "sample
and hold" characteristic of LCD.
• Dynamic Frame Insertion (DFI) (in some sets) resulting in
a 1080p resolution @ 100 Hz, thus eliminating the film
flicker caused by the frame rate of 24 frames per second of
cinematic film.
• Digital Natural Motion (DNM) to compensate the judder
(perceived when watching a moving object on the screen),
caused as side-effect during frame insertion (DFI) as
described above.
9.1.2

TV520 Architecture Overview

For details about the chassis block diagrams refer to chapter
"Block diagrams, Test Point Overview, and Waveforms". An
DDR
T6TF4HF6
Pacific 3
Picture
Quality
features
DUAL LVDS
1920x1080P@50Hz
DDR
EPLD DFI@1080p
DDR
Optional: Dynamic Frame Insertion (DFI)
Conversion 60Hz to 120Hz Q1080p
DUAL LVDS
1366x768p@100Hz
Flat display:
Flat display:
1366x768@100Hz
1366x768@100Hz
1920x1080p@100Hz
1920x1080p@100Hz
QUAD LVDS
1920x1080P@100Hz
DDR
EPLD
DDR
Ambient
Light
3
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