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Summary Table of Changes
The following table indicates the Specification Changes, Errata, Specification Clarifications or Documentation Changes, which apply
to the listed 82543GC steppings. Intel intends to fix some of the errata in a future stepping of the component, and to account for the
other outstanding issues through documentation or Specification Changes as noted. This table uses the following notations:
CODES USED IN SUMMARY TABLES
X:
Erratum, Specification Change or Clarification that applies to this stepping.
Doc:
Document change or update that will be implemented.
Fix:
This erratum is intended to be fixed in a future stepping of the component.
Fixed:
This erratum has been previously fixed.
NoFix:
There are no plans to fix this erratum.
(No mark) or (Blank Box):
This erratum is fixed in listed stepping or specification change does not apply to listed stepping.
Shaded:
This item is either new or modified from the previous version of the document.
No.
A0
A1
A2
Plans
1
X
X
X
NoFix
No.
A0
A1
A2
Plans
1
X
X
X
NoFix
2
X
X
X
NoFix
3
X
Fixed
4
X
Fixed
5
X
X
X
NoFix
6
X
X
X
NoFix
7
X
Fixed
8
X
Fixed
9
X
Fixed
10
X
X
X
NoFix
11
X
Fixed
12
X
X
X
NoFix
13
X
X
X
NoFix
14
X
X
X
NoFix
15
X
X
Fixed
16
X
Fixed
17
X
Fixed
18
X
X
X
NoFix
19
X
Fixed
20
X
Fixed
21
X
X
Fixed
22
X
X
X
NoFix
23
X
NoFix
24
X
X
X
NoFix
25
X
X
X
NoFix
SPECIFICATION CHANGES
GMII Setup and Hold Times
ERRATA
MDI Control Register Returns Incorrect Values
Descriptor Queue Maximum Size Limitation
Late Collision Statistics May Be Incorrect
Some Registers Cannot be Accessed During Reset
DAC Accesses May Not Be Interpreted Correctly
Flash Memory Functions Incorrectly in 64-Bit Address Space
Excessive Errors in 100Mb Half-Duplex Mode
48 Bit Preambles Sent in 10Mb and 100Mb Operation
CRS Detection Takes Too Long in MII Half-Duplex Mode
DMA Early Receive Function Does Not Work
ILOS Bit Copied Incorrectly from EEPROM to Speed Bits
Gigabit Half-Duplex Mode Operates Incorrectly
Zero-Byte PCI Bus Writes
TCP Segmentation Feature Operates Incorrectly
Incorrect Checksum Calculation and Indication
Transmitter Affected by Discarding Packets
Flash Memory Address Conflicts
Packet Buffer Memory Address Conflicts
Transmit Packet Corruption of Small Packets
Receive Packet Buffer Corruption When Nearly Full
Receive Packet Loss in 100Mb Half-Duplex Operation
TNCRS Statistic Register Has Live Count in Full-Duplex Mode
Receive IP Checksum Offload Disabled
EEPROM Initializes Software Defined Pins Incorrectly
Continuous XOFFs Transmitted When Receive Buffer Is Full
82543GC Gigabit Ethernet Controller Specification Update
Page
Affected
Document
9
Datasheet
Page
Notes
9
9
9
10
10
10
10
11
11
11
11
11
12
12
12
12
13
13
13
13
14
14
14
14
15
9
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