5.5
Platform IRQ Routing
Figure 9
shows that the Intel 6300ESB I/O Controller uses these segments:
•
IRQ14 and 15 for IDE segment
•
SERIRQ for SIOPIXRQ segment
•
PCRIRQ for the PCI-X segment
•
PIRQ for the PCI 32/33 segment
A Message Signalled Interrupt (MSI) scheme is used between the MCH and PXH over the PCI
Express bus. The PXH uses PAIRQ for the Channel A interface to PCI-X 64-bit/100 MHz
peripherals and PBIRQ for the Channel B interface to PCI-X 64/133. MSI and Non Maskable
Interrupt (NMI) are connected from the Intel 6300ESB I/O Controller to CPU0 and CPU1. The
platform also supports MSI for maskable and non-maskable interrupts.
Figure 9.
IRQ Routing Diagram
FS
NMI
CPU0
SMI
CPU0
®
Intel
Xeon™ Processor, Intel
PCI-E
PCI-E
4x
8x
MSI
MSI
PCI-E
PCI-E
MCH
PCI-E
HI
IDE
IRQ14/15
Intel ®
6300ESB
I/O
Controller
Hub
SERIRQ
SIO
®
E7520 Chipset, Intel
PCI-X SLOT
REQ/GNT: 0
IDSEL: AD17
A B C D
0
1
2
3
0
PXH
1
2
3
4
5
6
7
PCI-X SLOT
REQ/GNT: 0
IDSEL: AD16
A B C D
A
B
C
D
REQ/GNT: 0
E
IDSEL: AD17
F
G
H
A
B
C
D
®
6300ESB ICH Development Kit User's Manual
System Overview
PCI-X SLOT
PCI-X SLOT
REQ/GNT: 0
REQ/GNT: 1
IDSEL: AD17
IDSEL: AD18
A B C D
A B C D
Video
REQ/GNT: 1
IDSEL: AD17
A
PCI-X SLOT
PCI-X SLOT
REQ/GNT: 1
IDSEL: AD18
A B C D
A B C D
2940-02
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