Terminals Explanation:
D0 (Output):
D1 (Input):
CS (Input):
CLK (Input):
Gate array BBG010
QFP, 120 pin. Acts at 12.5 MHz. Access is possible with addresses 100000h-10003Fh.
Main function
Pin Drive Waveform Creation
Chip select output(Control, font ROM and BBG020)
DMA controller(For printing data transmission)
●
BBG010 pin assignment
Data output. Connect with PB3 of CPU.
Data input. Connect with PB1 of CPU.
Chip select. Active when "High". Connect with PB2 of CPU.
Clock for write/access data. Connect with PB0 of CPU.
73