Figure 21. Synchronous Timing - Seagate MEDALIST 1080SL Product Manual

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124
Medalist 1080sl SCSI Product Manual, August 1995
0
DB(7–0,P)–
1
0
I/O–
1
0
C/D–
1
0
MSG–
1
0
REQ–
1
0
ACK–
1
T1
T2

Figure 21. Synchronous timing

Description
I/O low to data bus enable
Data bus valid to REQ– low
REQ– assertion period
REQ– deassertion period
REQ– high to data hold
REQ– low ACK– low
ACK– assertion period
ACK– deassertion period
ACK– period
Last ACK– pulse high to phase
change
T5
T3
T4
T6
T7
T8
T9
Symbol
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T10
Min
400 nsec
57.5 nsec
30.0 nsec
30.0 nsec
10 nsec
30.0 nsec
30.0 nsec
100 nsec
125 nsec

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