Write Operations; Byte Write - Harman Kardon AVR145 Service Manual

AVR145
Figure 7. Write Mode Sequences with WC=1 (data write inhibited)
WC

BYTE WRITE

WC
PAGE WRITE
WC (cont'd)
PAGE WRITE
(cont'd)

Write Operations

Following a Start condition the bus master sends
a Device Select Code with the Read/Write bit
(RW) reset to 0. The device acknowledges this, as
shown in Figure
bytes. The device responds to each address byte
with an acknowledge bit, and then waits for the
data byte.
Writing to the memory may be inhibited if Write
Control (WC) is driven High. Any Write instruction
with Write Control (WC) driven High (during a pe-
riod of time from the Start condition until the end of
the two address bytes) will not modify the memory
contents, and the accompanying data bytes are
not acknowledged, as shown in
Each data byte in the memory has a 16-bit (two
byte wide) address. The Most Significant Byte
ble 4.) is sent first, followed by the Least Signifi-
cant Byte (Table
address of the byte in memory.
When the bus master generates a Stop condition
immediately after the Ack bit (in the "10
ACK
DEV SEL BYTE ADDR
R/W
ACK
DEV SEL BYTE ADDR
R/W
NO ACK NO ACK
DATA IN N
8., and waits for two address
Figure 7..
5.). Bits b15 to b0 form the
th
bit" time
ACK ACK
BYTE ADDR DATA IN
ACK ACK
BYTE ADDR DATA IN 1
slot), either at the end of a Byte Write or a Page
Write, the internal Write cycle is triggered. A Stop
condition at any other time slot does not trigger the
internal Write cycle.
After the Stop condition, the delay t
cessful completion of a Write operation, the de-
vice's internal address counter is incremented
automatically, to point to the next byte address af-
ter the last one that was modified.
During the internal Write cycle, Serial Data (SDA)
is disabled internally, and the device does not re-
spond to any requests.
Byte Write
After the Device Select code and the address
bytes, the bus master sends one data byte. If the
addressed location is Write-protected, by Write
(Ta-
Control (WC) being driven High, the device replies
with NoAck, and the location is not modified. If, in-
stead, the addressed location is not Write-protect-
ed, the device replies with Ack. The bus master
terminates the transfer by generating a Stop con-
dition, as shown in
136
harman/kardon
M24C64, M24C32
NO ACK
NO ACK
DATA IN 2
AI01120C
, and the suc-
W
Figure 8..
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