Address Map; Section 4, "Programmers Model - Motorola SPX3BUM/D User Manual

4 Programmers Model
This section describes support information which may be useful to hardware or software designers who are
using Sandpoint 3.

4.1 Address Map

Table 17 shows the general address map of the Sandpoint 3, and Table 18 shows the specific location of
ISA/PCI I/O addresses. Both tables assume Map "B" (CHRP), which is the default and officially
encouraged standard.
Table 17. Global Address Map
START
0000_0000 3FFF_FFFF
4000_0000 77FF_FFFF
7800_0000 7BFF_FFFF
7C00_0000 7FFF_FFFF
8000_0000 FCFF_FFFF
FD00_0000 FDFF_FFFF
FE00_0000 FEBF_FFFF
FEC0_0000 FEDF_FFFF
FEE0_0000 FEEF_FFFF
FEF0_0000 FEFF_FFFF
FF00_0000 FF7F_FFFF
FF80_0000 FFFF_FFFF
NOTES:
1. Requires memory control registers to be properly programmed (MCCR[1:4], MS[E]AR[1:2], ME[E]AR[1:2], MBEN).
2. MPC107 or MPC8245 only.
3. Only software-enabled PCI devices appear in this space.
4. Only software-enabled PCI/ISA I/O devices appear in this space.
The detailed address map in Table 18 assumes that the PnP devices have not been changed from the default
locations.
Start
FE00_0000
16
END Definition
SDRAM
reserved
RCS3 ROM space
RCS2 ROM space
PCI memory
PCI/ISA memory
PCI/ISA I/O space
PCI configuration
address register
PCI configuration data
register
Interrupt Acknowledge
RCS1 ROM space
RCS0 ROM space
(Boot ROM)
Table 18. Detailed ISA I/O Address Map
End Mode
--- R/W
Notes
1
2
2
3
4
Device
WB DMA Channel 0 Base/Current Address
Register
MOTOROLA
Notes