1 Introduction The Sandpoint III motherboard, or “SP3” for short, is an evaluation baseboard which accepts one Motorola Processor PMC (MPMC) or PrPMC card, as well as up to four PCI cards, and supplies typical PC-I/O peripherals. Sandpoint provides a flexible base for the evaluation of new Motorola processor devices, and for early software design for customer project using Motorola processors.
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LED monitors for critical functions. The I/O subsystem is identical to that of the Sandpoint 2 and the “EC” version of the older Yellowknife development platform. When properly configured, software written for these platforms should operate identically when executed on a Sandpoint 3. MOTOROLA...
Startup a terminal emulator program. Common terminal emulators include “Hyperterminal”, available for free with most Windows PCs, and many commercial programs such as Hayes “SmartComm”. Setup the PCs terminal program to use the following settings: • 9600 Baud • 8 Bits • No Parity MOTOROLA...
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( (AltiVec) ) Version : 12.2, Metaware Build Released : Jan 31, 2001 Written by : Motorola’s RISC Applications Group, Austin, TX System : Sandpoint with Altimus/Talos (MPMC60x/7xx/74xx) Processor : MPC7400 V2.8 @ 500 MHz, Memory @ 100 MHz Memory : Map B (CHRP), 00000000...03FFFFFF Copyright Motorola Inc.
DB9 Female Back View Back View Figure 3. Null Modem Diagram Once the cable is available or constructed, attach one end to the Sandpoint COM1 port and the other to the PC/Workstation. Either end will work with either computer. MOTOROLA...
Another reason to change the configuration is to use the legacy modes for Sandpoint 2 compatibility. Refer to Appendix A for details on legacy configurations. All options on Sandpoint 3 are set via two ‘DIP’ switches, as shown in Figure 4. POWER SUPPLY WINBOND POWER SWITCH WINBOND Figure 4. Sandpoint 3 in an ATX Chassis MOTOROLA...
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SW1 is located near the bottom of the Sandpoint 3 board, near the end of the fourth PCI slot. It controls the features shown in Table 1: Table 1. Sandpoint 3 SW1 Options Switch Name Definition Default ROMSEL ROM Selection ROM1WP ROM1 Write Protect reserved reserved FRCPCI33 Force PCI to 33MHz EXTCLK Use external clock SSCLK Spread-Spectrum Clock MOTOROLA...
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On (right) ROM1 may be read to or written from. Use to store OS code. Off (left) ROM1 is write-protected. NOTE: Not all Sandpoint 3’s have a secondary flash. 3.1.3 Reserved Switch SW2-3 is reserved and has no function. MOTOROLA...
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NOTE: Care must be used that the devices receiving the clock are capable of and are configured to operate at the new clock speed. In particular, Motorola processors have internal PLLs which require a minimum clock input to operate properly.
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APC under software control. If PSON is selected, the system remains on until external power is removed. Table 9. Sandpoint 3 PSON Switch PSON Definition Notes SW1-8 On (right) Force power on always. Normal mode. Off (left) Normal power control mode MOTOROLA...
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SP3 systems should be upgraded. SP3 exclusively uses the Winbond as the system arbiter; requests are assigned as follows: WB_REQ(0) = PMC_REQ(0) WB_REQ(1) = SLOT_REQ(1) WB_REQ(2) = SLOT_REQ(2) WB_REQ(3) = SLOT_REQ(3) WB_REQ(4) = SLOT_REQ(4) And grants are handled correspondingly. MOTOROLA...
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‘slot’ corresponding to each external interrupt Table 13. Sandpoint 3 Serial Interrupt Slot Assignment Slot Interrupt Source Note SIOINT Inverted, so active low reserved reserved SLOT #1 INTA# from each slot. SLOT #2 SLOT #3 SLOT #4 WinBond INTA# No specific function MOTOROLA...
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INTB# INTA# INTD# SLOT_INT(3) PMC INT(2) INTD# INTC# INTB# INTA# SLOT_INT(4) PMC INT(3) For single-interrupt cards (the vast majority), there is a one-to-one correspondence between the slot and the PMC interrupt input (shown in bold entries in Table 14.). MOTOROLA...
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On (right) On (right) GPIO1 = ”XXXX00XX” Default On (right) Off (left) GPIO1 = ”XXXX01XX” Off (left) On (right) GPIO1 = ”XXXX10XX” Off (left) Off (left) GPIO1 = ”XXXX11XX” See Section 4 for details on reading the GPIO port. MOTOROLA...
4. Only software-enabled PCI/ISA I/O devices appear in this space. The detailed address map in Table 18 assumes that the PnP devices have not been changed from the default locations. Table 18. Detailed ISA I/O Address Map Start Mode Device Register Notes FE00_0000 DMA Channel 0 Base/Current Address MOTOROLA...
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1. Requires that the indicated device in the SIO has been enabled through the PnP (Plug-and-Play) enumeration port (PnP Index/Data registers). 2. This register is programmable; shown is the DINK debugger default value. 3. Requires programming SIO chip-select registers to the shown (common) value. MOTOROLA...
MPMC boards, but this requires desoldering and replacing the flash with a special cable. 6.4 Running Code Under DINK Once the program has been downloaded into memory, it can be execute by entering ‘go 90000’ (or other starting address). DINK will preset all the registers (integer, floating and special-purpose) to the default MOTOROLA...
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Or if you want DINK to do the initialization, just leave the PROGMODE switch ON and DINK will boot normally. To run your code, use the command “go ff000000” (or whatever the correct address may be). To automatically run your code upon reset, enter the command: ENV BOOT=0xFF000000 MOTOROLA...
With the use of the MPMC standard for evaluation processor modules, it is relatively easy to swap out the processor card in a Sandpoint with another CPU. This allows evaluating code for a variety of Motorola host and integrated processors, and each PMC card has the ability to change the operating speed to further adjust Sandpoint to resemble the target platform.
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Restart, and the new version of DINK should activate. If an error occurs, DINK will not work and the flash will need to be externally re-programmed on a PROM programmer. If the safety copy was made in step 1 above, just set the ROMLOC switch to boot from the local flash instead of PCI. MOTOROLA...
If all MPMC LEDs do not activate while DINK, check the activity of the MPMC LEDs and the the Reset button is pressed and held, SP3 LEDs. the MPMC card is not installed or not functioning. Insure card is firmly seated and re-try. MOTOROLA...
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If you can type on the terminal, the handshaking is correct. If power is on, LEDs are active, system is in default Contact Motorola technical support. configuration, and the PCI LED is active continuously, and the connections and handshaking are correct.
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7.1 None of the Above If none of the above help, you may contact the Motorola CPD hotline for assistance. The required procedure is that you must contact your Motorola sales/FAE or distribution channel to forward your help request. Incl ude a detailed description of the problem.
4. Write 1 to GPIO pin 7; read GPIO pin 6. 5. Write 0 to GPIO pin 7; read GPIO pin 6. 6. If read values are “[1, 0]”, then the motherboard is 3; else it is 2. There is no Sandpoint X1 as far as you know. MOTOROLA...
Winbond) can be configured for 5V or 3V operation (as a build option). PCI slots are correctly numbered in order. None. Might affect any installation instructions, though if so, they could only get clearer and less confusing. Test clock input enable works. None. MOTOROLA...
EPIC device avaiable on Motorola MPMC cards. However, for backward compatibility purposes, SP3 supports the SP 1/2 interrupt scheme. For more details on the interconnections, refer to the SPX2TS (Sandpoint 2 Technical Summary), available on the Motorola Website.
Appendix C: Reference Documentation Table 24 describes reference documentation which may be useful for understanding the operation of the Sandpoint or an attached MPMC card: Table 24. Reference Documentation Document Number/Reference Sandpoint 3 Technical Summary http://e-www.motorola.com/webapp/sps/site/pro Schematics d_summary.jsp?code=SANDPOINTX3 Errata MPMC Schematics http://e-www.motorola.com/webapp/sps/site/pro Documentation d_summary.jsp?code=SANDPOINTX3...
Battery-Backed Random Access Memory Integrated Device Electronics -- common disk interface signalling. MPMC Motorola Processor PCI Mezzanine Card -- an superset of the VITA PrPMC specification proposal which adds PCI arbitration. Peripheral Connect Interface PCI Mezzanine Card -- a small form-factor PCI-2.0 compliant daughtercard standard.
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