Rewriting Flash Memory - Sharp ER-A750 Service Manual

17. Rewriting flash memory

Below are the memory maps at the time of normal operation, ship-
ping from the factory and IPL.
1. During normal operation (Fig. 17)
2. When leaving the factory (Fig. 18)
When a service PWB or AMRS PWB is inserted into an expansion I/O
port, the PROM addresses on the service PWB are D00000H
DFFFFFh and 000000h 007FFFFh (the map of D00000h
D07FFFh).
At this time, IPLON0 signal input into the input port P10 of the CPU
becomes "L" level.
Typical procedure for rewriting flash memory
If PLON0 is found to be at "L" level by the program inside the 0page
PROM, the contents in the PROM is written into the flash memory.
During normal operation
000000h
0 page ROM
007FFFh
180000h
PSRAM
1FFFFFh
C00000h
FLASH ROM
CFFFFFh
When leaving the factory
000000h
0 page PROM
007FFFh
PSRAM
C00000h
FLASH ROM
D00000h
DFFFFFh
Fig. 17
COPY
PROM
Fig. 18
3. During IPL
Typical procedure for rewriting flash memory
When IPLON1 = "L" is detected at starting, the IPL routine is written
into the PSRAM as shown in the figure below, and the IPL routine is
used for rewriting the flash memory. (The IPLON1 signal is con-
trolled by the DIP switch and connected to the CPU P11.
0 page PROM
PSRAM
FLASH ROM
0 page PROM
PSRAM
FLASH ROM
7 – 34
IP RUITINE COPY
PROGRAM DAT
(SERIAL)
WRITE
Fig. 19