Sharp ER-A750 Service Manual page 47

3) Pin configuration
33
34
NC
CSI
CLK/TRG3
CLK/TRG2
NC
NC
CLK/TRG1
CLK/TRG0
NC
+5V
NC
44
1
Figure 2c. 44-pin Quad Flat Pack Pin Assignments
4) Functional description
The Z80 CTC has four independent counter/timer channels. Each
channel is individually programmed with two words: a control word
and a time-constant word. The control word selects the operating
mode (counter or timer), enables or disables the channel interrupt,
and selects certain other operating parameters. If the timing mode is
selected, the control word also sets a prescaler, which divides the
system clock by either 16 or 256. The time-constant word is a value
from 1 to 256.
During operation, the individual counter channel counts down from
the preset time constant value. In counter mode operation the
counter decrements on each of the CLK/TRG input pulses until zero
count is reached. Each decrement is synchronized by the system
clock. For counts greater than 256, more than one counter can be
cascaded. At zero count, the down-counter is automatically reset
with the time constant value.
The timer mode determines time intervals as small as 2 s (8 MHz),
3 s (6 MHz), or 4 s (4 MHz) without additional logic or software
timing loops. Time intervals are generated by dividing the system
clock with a prescaler that decrements a preset down-counter.
Thus, the time interval is an integral multiple of the clock period, the
prescaler value (16 or 256), and the time constant that is preset in
the down-counter. A timer is triggered automatically when its time
constant value is programmed, or by an external CLK/TRG input.
Three channels have two outputs that occur at zero count.
The first output is a zero-count/timeout pulse at the ZC/TO output.
The fourth channel (Channel 3) does not have a ZC/TO output; inter-
rupt request is the only output available from Channel 3.
The second output is Interrupt Request (INT), which occurs if the
channel has its interrupt enabled during programming. When the
Z80 CPU acknowledges Interrupt Request, the Z80 CTC places an
interrupt vector on the data bus.
The four channels of the Z80 CTC are fully prioritized and fit into four
configuous slots in a standard Z80 daisy-chain interrupt structure.
Channel 0 is the highest priority and Channel 3 the lowest. Interrupts
can be individually enabled (or disabled) for each of the four chan-
nels.
23
2 2
CMOS
Z80 CTC
1 2
1 1
5) Pin description
Pin
Symbol
No.
1 D0
2 D1
3 D2
IEO
4 D3
IORQ
5 NC
NC
6 NC
ZC/TO2
ZC/TO1
7 NC
NC
8 D4
ZC/TO0
9 D5
NC
10 D6
RD
11 NC
GND
D7
12 D7
13 GND
14 RD
15 NC
16 ZC/TO0
17 NC
18 ZC/TO1
19 ZC/TO2
20 NC
21 IORQ
22 IEO
23 INT
24 NC
25 IEI
26 NC
27 M1
28 NC
29 CLK
30 NC
31 CE
32 RESET
33 CS0
34 NC
35 CS1
36 CLK/TRG3
37 CLK/TRG2
38 NC
39 NC
40 CLK/TRG1 S INTS
41 CLK/TRG0
42 NC
43 +5V
44 NC
7 – 17
Signal
In/Out Function
name
S D0 In/Out Data bus
S D1 In/Out Data bus
S D2 In/Out Data bus
S D3 In/Out Data bus
NC — NC
NC — NC
NC — NC
S D4 In/Out Data bus
S D5 In/Out Data bus
S D6 In/Out Data bus
NC — NC
S D7 In/Out Data bus
GND — GND
S RDS In Read cycle status signal
NC — NC
S TM0 Out Zero count / Timeout signal
NC — NC
NC — NC
NC — NC
NC — NC
S IORQ In Input / Output request signal
NC — NC
S INT Out Interrupt request signal
NC — NC
VCC — +5V
NC — NC
S M1 In Machine cycle one signal
NC — NC
CLK In System clock
NC — NC
S A6 In Chip enable signal
S RES In Reset signal
S A0 In Channelselect signal
NC — NC
S A1 In Channelselect signal
S TM1 In External clock / timer signal
S TM0 In External clock / timer signal
NC — NC
NC — NC
In External clock / timer signal
VCC In +5V
NC — NC
VCC — +5V
NC — NC